DF2211NP24V Renesas Technology / Hitachi Semiconductor, DF2211NP24V Datasheet - Page 541

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DF2211NP24V

Manufacturer Part Number
DF2211NP24V
Description
H8S/2200 Series, 2212 Group, USB, RTC, HSS TNP-64B; Vcc= 2.7 to 3.6 volts, Temp= -20 to 75 C; Package: PVQN0064LB-A
Manufacturer
Renesas Technology / Hitachi Semiconductor
Datasheet
14.3.24 USB Interrupt Select Register 3 (UISR3)
UISR3 sets EXIRQ to output interrupt request indicated in the interrupt flag register 3 (UIFR3).
When a bit in UIER3 corresponding to the UISR3 bit is cleared to 0, an interrupt request is output
from EXIRQ0. When a bit in UIER3 corresponding to the UISR3 bit is set to 1, an interrupt
request is output from EXIRQ1.
14.3.25 USB Data Status Register (UDSR)
UDSR indicates whether the IN FIFO data registers (EP1, and EP3) contain valid data or not. A bit
in USDR is set when data written to the corresponding IN FIFO becomes valid after the
corresponding PKTE bit in UTRG is set to 1. A bit in USDR is cleared when all valid data is sent
to the host. For EP1, having a dual-FIFO configuration, the corresponding bit in USDR is cleared
to 0 and FIFO becomes empty.
Bit
7
6
5
4 to 1 —
0
Bit Name
CK48READYS 0
SOFS
SETCS
VBUSiS
Initial Value R/W
0
0
All 0
0
R/W
R/W
R/W
R
R/W
Description
Selects the CK48READY interrupt.
Selects the SOF interrupt.
Selects the SETC interrupt.
Reserved
These bits are always read as 0.
Selects the VBUSi interrupt.
Rev.7.00 Dec. 24, 2008 Page 487 of 698
REJ09B0074-0700

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