DF2211NP24V Renesas Technology / Hitachi Semiconductor, DF2211NP24V Datasheet - Page 254
DF2211NP24V
Manufacturer Part Number
DF2211NP24V
Description
H8S/2200 Series, 2212 Group, USB, RTC, HSS TNP-64B; Vcc= 2.7 to 3.6 volts, Temp= -20 to 75 C; Package: PVQN0064LB-A
Manufacturer
Renesas Technology / Hitachi Semiconductor
Datasheet
1.DF2211NP24V.pdf
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Full Address Mode (Block Transfer Mode): Figure 7.18 shows a transfer example in which
TEND* output is enabled and word-size full address mode transfer (block transfer mode) is
performed from internal 16-bit, 1-state access space to external 16-bit, 2-state access space.
A one-block transfer is performed for one transfer request, and after the transfer the bus is
released. While the bus is released, one or more bus cycles are inserted by the CPU.
In the transfer end cycle of each block (the cycle in which the transfer counter reaches 0), a one-
state DMA dead cycle is inserted after the DMA write cycle.
One block is transmitted without interruption. NMI generation does not affect block transfer
operation.
Note: * This LSI does not support TEND output.
Rev.7.00 Dec. 24, 2008 Page 200 of 698
REJ09B0074-0700
Address bus
Note: * This LSI does not support TEND output.
TEND*
HWR
Figure 7.18 Example of Full Address Mode (Block Transfer Mode) Transfer
LWR
Bus release
RD
φ
DMA
read
DMA
write
Block transfer
DMA
read
DMA
write
DMA
dead
Bus release
DMA
read
DMA
write
Last block transfer
DMA
read
DMA
write
DMA
dead
Bus release
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