DF2211NP24V Renesas Technology / Hitachi Semiconductor, DF2211NP24V Datasheet - Page 516
DF2211NP24V
Manufacturer Part Number
DF2211NP24V
Description
H8S/2200 Series, 2212 Group, USB, RTC, HSS TNP-64B; Vcc= 2.7 to 3.6 volts, Temp= -20 to 75 C; Package: PVQN0064LB-A
Manufacturer
Renesas Technology / Hitachi Semiconductor
Datasheet
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13.4
13.4.1
Figure 13.3 shows the TAP controller status transition diagram, based on the JTAG standard.
Note: The transition condition is the TMS value at the rising edge of TCK. The TDI value is
Rev.7.00 Dec. 24, 2008 Page 462 of 698
REJ09B0074-0700
TFP-100G
TFP-100GV
Pin No.
80
81
sampled at the rising edge of the TCK and shifted at the falling edge of the TCK. The
TDO value changes at the falling edge of the TCK. In addition, TDO is high-impedance
state in a state other than Shift-DR or Shift-IR state. If TRST is 0, Test-Logic-Reset state
is entered asynchronously with the TCK.
TAP Controller
Boundary Scan Function Operation
BP-112
BP-112V
Pin No.
A9
C8
1
1
0
Test-Logic-Reset
Run-Test/Idle
Select-DR
Capture-DR
Update-DR
1
Exit1-DR
Shift-DR
Figure 13.3 TAP Controller Status Transition
1
1
1
0
0
0
0
Pin Name
FWE
NMI
0
0
1
Pause-DR
Exit2-DR
1
to TDO
0
0
1
0
1
Capture-IR
Update-IR
Select-IR
Exit1-IR
Shift-IR
1
1
0
0
0
1
IN
IN
I/O
0
1
Pause-IR
Exit2-IR
1
Bit Name
1
0
0
0
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