DF2211NP24V Renesas Technology / Hitachi Semiconductor, DF2211NP24V Datasheet - Page 482
DF2211NP24V
Manufacturer Part Number
DF2211NP24V
Description
H8S/2200 Series, 2212 Group, USB, RTC, HSS TNP-64B; Vcc= 2.7 to 3.6 volts, Temp= -20 to 75 C; Package: PVQN0064LB-A
Manufacturer
Renesas Technology / Hitachi Semiconductor
Datasheet
1.DF2211NP24V.pdf
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12.7.2
Figure 12.25 shows the transfer data format in Smart Card interface mode.
• One frame consists of 8-bit data plus a parity bit in asynchronous mode.
• In transmission, a guard time of at least 2 etu (Elementary time unit: the time for transfer of
• If a parity error is detected during reception, a low error signal level is output for one etu
• If an error signal is sampled during transmission, the same data is retransmitted automatically
Data transfer with other types of IC cards (direct convention and inverse convention) are
performed as described in the following.
With the direction convention type IC and the above sample start character, the logic 1 level
corresponds to state Z and the logic 0 level to state A, and transfer is performed in LSB-first order.
The start character data above is H'3B. For the direct convention type, clear the SDIR and SINV
Rev.7.00 Dec. 24, 2008 Page 428 of 698
REJ09B0074-0700
one bit) is left between the end of the parity bit and the start of the next frame.
period, 10.5 etu after the start bit.
after a delay of 2 etu or longer.
Data Format (Except for Block Transfer Mode)
When there is no parity error
When a parity error occurs
D
D0 to D7:
Dp:
DE:
Legend:
S
:
Figure 12.26 Direct Convention (SDIR = SINV = O/E = 0)
Figure 12.25 Normal Smart Card Interface Data Format
(Z)
Ds
Ds
Start bit
Data bits
Parity bit
Error signal
Ds
A
D0
D0
D0
Z
D1
D1
D1
Z
Transmitting station output
Transmitting station output
D2
D2
D2
A
D3
Z
D3
D3
D4
Z
D4
D4
D5
Z
D5
D5
D6
A
D6
D6
D7
A
Dp
Z
D7
D7
Dp
Dp
(Z) State
Receiving station
output
DE
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