DF2211NP24V Renesas Technology / Hitachi Semiconductor, DF2211NP24V Datasheet - Page 379
DF2211NP24V
Manufacturer Part Number
DF2211NP24V
Description
H8S/2200 Series, 2212 Group, USB, RTC, HSS TNP-64B; Vcc= 2.7 to 3.6 volts, Temp= -20 to 75 C; Package: PVQN0064LB-A
Manufacturer
Renesas Technology / Hitachi Semiconductor
Datasheet
1.DF2211NP24V.pdf
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Output Compare Output Timing: A compare match signal is generated in the final state in
which TCNT and TGR match (the point at which the count value matched by TCNT is updated).
When a compare match signal is generated, the output value set in TIOR is output at the output
compare output pin. After a match between TCNT and TGR, the compare match signal is not
generated until the TCNT input clock is generated. Figure 9.32 shows output compare output
timing.
Input Capture Signal Timing: Figure 9.33 shows input capture signal timing.
TCNT
input clock
TCNT
TGR
Compare
match signal
TIOC pin
Input capture
input
Input capture
signal
TCNT
TGR
φ
φ
Figure 9.33 Input Capture Input Signal Timing
Figure 9.32 Output Compare Output Timing
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Rev.7.00 Dec. 24, 2008 Page 325 of 698
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REJ09B0074-0700
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