DSPIC33FJ64GP306 Microchip Technology Inc., DSPIC33FJ64GP306 Datasheet - Page 31

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DSPIC33FJ64GP306

Manufacturer Part Number
DSPIC33FJ64GP306
Description
High-performance, 16-bit Digital Signal Controllers
Manufacturer
Microchip Technology Inc.
Datasheet

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3.0
The dsPIC33FJXXXGPX06/X08/X10 architecture fea-
tures separate program and data memory spaces and
buses. This architecture also allows the direct access
of program memory from the data space during code
execution.
© 2007 Microchip Technology Inc.
Note:
MEMORY ORGANIZATION
This data sheet summarizes the features
of
of dsPIC33FJXXXGPX06/X08/X10
devices. It is not intended to be a compre-
hensive reference source. To complement
the information in this data sheet, refer to
the “dsPIC33F Family Reference Manual”.
Please refer to the Microchip web site
(www.microchip.com)
dsPIC33F
sections.
Family
this
Reference
for
dsPIC33FJXXXGPX06/X08/X10
the
Manual
group
latest
3.1
The
dsPIC33FJXXXGPX06/X08/X10 devices is 4M instruc-
tions. The space is addressable by a 24-bit value derived
from either the 23-bit Program Counter (PC) during pro-
gram execution, or from table operation or data space
remapping as described in Section 3.6 “Interfacing Pro-
gram and Data Memory Spaces”.
User access to the program memory space is restricted to
the lower half of the address range (0x000000 to
0x7FFFFF). The exception is the use of TBLRD/TBLWT
operations, which use TBLPAG<7> to permit access to the
Configuration bits and Device ID sections of the
configuration memory space. Memory usage for the
dsPIC33FJXXXGPX06/X08/X10 of devices is shown in
Figure 3-1.
program
Program Address Space
address
memory
DS70286A-page 29
space
of
the

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