DSPIC33FJ64GP306 Microchip Technology Inc., DSPIC33FJ64GP306 Datasheet - Page 251

• Manufacturer Part Number: DSPIC33FJ64GP306
• Description: High-performance, 16-bit Digital Signal Controllers
• Manufacturer: Microchip Technology Inc.

dsPIC33FJXXXGPX06/X08/X10 family incorporate an
on-chip regulator that allows the device to run its core
logic from V
The regulator provides power to the core from the other
V
than 5 ohms) capacitor (such as tantalum or ceramic)
be connected to the V
This helps to maintain the stability of the regulator. The
recommended value for the filter capacitor is provided
in TABLE 24-13: “Internal Voltage Regulator Speci-
fications” located in Section 24.1 “DC Characteris-
tics”.
On a POR
voltage regulator to generate an output voltage. During
this time, designated as T
disabled. T
resumes operation after any power-down.
FIGURE 21-1:
© 2007 Microchip Technology Inc.
DD
Note 1:
pins. The regulator requires that a low-ESR (less
,
STARTUP
it takes approximately 20 μs for the on-chip
C
DD
F
These are typical operating voltages. Refer
to TABLE 24-13: “Internal Voltage Regu-
lator Specifications” located in
Section 24.1 “DC Characteristics” for the
full operating ranges of V
.
3.3V
is applied every time the device
DDCORE
CONNECTIONS FOR THE
ON-CHIP VOLTAGE
REGULATOR
V
V
V
DD
DDCORE
SS
dsPIC33F
STARTUP
/V
/V
CAP
CAP
, code execution is
DD
pin (Figure 21-1).
dsPIC33FJXXXGPX06/X08/X10
and V
(1)
DDCORE
.
21.3
The BOR (Brown-out Reset) module is based on an
internal voltage reference circuit that monitors the
regulated voltage V
BOR module is to generate a device Reset when a
brown-out condition occurs. Brown-out conditions are
generally caused by glitches on the AC mains (i.e.,
missing portions of the AC cycle waveform due to bad
power transmission lines or voltage sags due to
excessive current draw when a large inductive load is
turned on).
A BOR will generate a Reset pulse which will reset the
device. The BOR will select the clock source, based on
the device Configuration bit values (FNOSC<2:0> and
POSCMD<1:0>). Furthermore, if an oscillator mode is
selected, the BOR will activate the Oscillator Start-up
Timer (OST). The system clock is held until OST
expires. If the PLL is used, then the clock will be held
until the LOCK bit (OSCCON<5>) is ‘1’.
Concurrently, the PWRT time-out (TPWRT) will be
applied before the internal Reset is released. If TPWRT
= 0 and a crystal oscillator is being used, then a nomi-
nal delay of TFSCM = 100 is applied. The total delay in
this case is TFSCM.
The BOR Status bit (RCON<1>) will be set to indicate
that a BOR has occurred. The BOR circuit, if enabled,
continues to operate while in Sleep or Idle modes and
will reset the device should VDD fall below the BOR
threshold voltage.
BOR: Brown-Out Reset
DDCORE
. The main purpose of the
DS70286A-page 249