DSPIC33FJ64GP306 Microchip Technology Inc., DSPIC33FJ64GP306 Datasheet - Page 157

• Manufacturer Part Number: DSPIC33FJ64GP306
• Description: High-performance, 16-bit Digital Signal Controllers
• Manufacturer: Microchip Technology Inc.

13.0
The input capture module is useful in applications
requiring frequency (period) and pulse measurement.
The dsPIC33FJXXXGPX06/X08/X10 devices support
up to eight input capture channels.
The input capture module captures the 16-bit value of
the selected Time Base register when an event occurs
at the ICx pin. The events that cause a capture event
are listed below in three categories:
1.
FIGURE 13-1:
© 2007 Microchip Technology Inc.
Note:
Note: An ‘x’ in a signal, register or bit name denotes the number of the capture channel.
ICx Pin
Simple Capture Event modes
-Capture timer value on every falling edge of
-Capture timer value on every rising edge of
input at ICx pin
input at ICx pin
INPUT CAPTURE
This data sheet summarizes the features
of this group of dsPIC33FJXXXGPX06/
X08/X10 devices. It is not intended to be a
comprehensive reference source.
complement the information in this data
sheet, refer to the “dsPIC33F Family
Reference Manual” . Please refer to the
Microchip web site (www.microchip.com)
for the latest dsPIC33F Family Reference
Manual sections.
Prescaler
(1, 4, 16)
Counter
3
INPUT CAPTURE BLOCK DIAGRAM
System Bus
ICxCON
ICM<2:0> (ICxCON<2:0>)
ICOV, ICBNE (ICxCON<4:3>)
Mode Select
dsPIC33FJXXXGPX06/X08/X10
Edge Detection Logic
Clock Synchronizer
ICxI<1:0>
and
To
(in IFSn Register)
Set Flag ICxIF
Interrupt
Logic
2.
3.
Each input capture channel can select between one of
two 16-bit timers (Timer2 or Timer3) for the time base.
The selected timer can use either an internal or
external clock.
Other operational features include:
• Device wake-up from capture pin during CPU
• Interrupt on input capture event
• 4-word FIFO buffer for capture values
• Input capture can also be used to provide
Sleep and Idle modes
- Interrupt optionally generated after 1, 2, 3 or
additional sources of external interrupts
Note:
-Capture timer value on every 4th rising edge
-Capture timer value on every 16th rising
Capture timer value on every edge (rising and
falling)
Prescaler Capture Event modes
4 buffer locations are filled
of input at ICx pin
edge of input at ICx pin
Logic
FIFO
R/W
Only IC1 and IC2 can trigger a DMA data
transfer. If DMA data transfers are
required, the FIFO buffer size must be set
to 1 (ICI<1:0> = 00).
From 16-bit Timers
TMRy TMRz
1
ICxBUF
16
0
DS70286A-page 155
16
ICTMR
(ICxCON<7>)