S1D13700F02 Epson Electronics America, Inc., S1D13700F02 Datasheet - Page 70

• Manufacturer Part Number: S1D13700F02
• Description: Embedded Memory Graphics Lcd Controller
• Manufacturer: Epson Electronics America, Inc.

Page 70
11.1 System Control
11.1.1 SYSTEM SET
S1D13700F02
X42D-A-001-01
Note
Note
See Section 15.1.2, “Initialization Example” on page 104 for the initialization sequence.
See Section , “SYSTEM SET” on page 44 for further information.
If the S1D13700F02 is in power save mode (at power up or after a POWER SAVE com-
mand), the SYSTEM SET command will exit power save mode. After writing the SYS-
TEM SET command and its 8 parameters, the S1D13700F02 will be in normal
operation.
MSB
1
2
3
4
5
MOD
bit 7
IV is the Screen Origin Compensation bit, REG[00h] bit 5.
W/S is the Panel Drive Select bit, REG[00h] bit 3.
M2 is the Character Height bit, REG[00h] bit 2.
M0 is the Character Generator Select bit, REG[00h] bit 0.
MOD is defined by REG[01h] bit 7.
0
0
0
Table 11-5 SYSTEM SET Command and Parameters
5
bit 6
1
0
0
0
bit 5
IV
0
0
0
1
REG[03h] bits 7-0
REG[04h] bits 7-0
REG[05h] bits 7-0
REG[06h] bits 7-0
REG[07h] bits 7-0
bit 4
0
1
0
0
Revision 1.01
W/S
bit 3
0
2
REG[01h] bits 3-0
REG[02h] bits 3-0
bit 2
M2
0
3
bit 1
0
0
LSB
bit 0
M0
0
4
Indirect
P1
P2
P3
P4
P5
P6
P7
P8
C
Epson Research and Development
Hardware Functional Specification
Vancouver Design Center
Issue Date: 2005/11/29