S1D13700F02 Epson Electronics America, Inc., S1D13700F02 Datasheet - Page 19
S1D13700F02
Manufacturer Part Number
S1D13700F02
Description
Embedded Memory Graphics Lcd Controller
Manufacturer
Epson Electronics America, Inc.
Datasheet
1.S1D13700F02.pdf
(130 pages)
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5.2.3 Clock Input
5.2.4 Power And Ground
Hardware Functional Specification
Issue Date: 2005/11/29
COREVDD
Pin Name Type Pin #
Pin Name Type Pin #
HIOVDD
NIOVDD
XCG1
XCD1
CLKI
VSS
O
P
P
P
P
I
I
55, 48,
40, 25,
53, 33,
28, 17,
32, 22
35
34
39
12
7
1
Cell
LOT
Cell
LIN
CI
P
P
P
P
Table 5-5 Power And Ground Pin Descriptions
COREVDD
COREVDD
HIOVDD
Power
Power
Table 5-4 Clock Input Pin Descriptions
—
—
—
—
Power On
Power On
RESET#/
RESET#/
State
State
—
—
—
—
—
—
—
Revision 1.01
This input pin is the crystal connection for use with the internal
oscillator. This pin must be pulled down when using an external
clock source (CLKI). For further information on the use of the
internal oscillator, see Section 9.3, “Oscillator Circuit” on page
42.
This output pin is the crystal connection for use with the internal
oscillator. This pin must be left unconnected when using an
external clock source (CLKI). For further information on the use
of the internal oscillator, see Section 9.3, “Oscillator Circuit” on
page 42.
This is the external clock input. This pin must be pulled down
when using a crystal with the internal oscillator. For further
information on clocks, see Section 9, “Clocks” on page 41.
IO power supply for the Host (MPU) interface, 3.3/5.0 volts.
IO power supply for the LCD interface, 3.3/5.0 volts.
Core power supply, 3.3 volts.
Ground for HIOVDD, NIOVDD, and COREVDD
Description
Description
X42D-A-001-01
S1D13700F02
Page 19
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