ST7LITE49K2 STMicroelectronics, ST7LITE49K2 Datasheet - Page 90

• Manufacturer Part Number: ST7LITE49K2
• Description: 8-bit MCU
• Manufacturer: STMicroelectronics

Specifications of ST7LITE49K2

• 8 Kbytes Single Voltage Extended Flash (xflash) Program Memory With Read-out Protection In-circuit Programming And In-application Programming (icp And Iap) Endurance: 10K write/erase cycles guaranteed Data retention
• 256 Bytes Data Eeprom With Read-out Protection. 300k Write/erase Cycles Guaranteed, Data Retention: 20 years at 55 °C.
• Clock Sources: Internal trimmable 8 MHz RC oscillator, auto-wakeup internal low power - low frequency oscillator, crystal/ceramic resonator or external clock
• Five Power Saving Modes: Halt, Active-halt, Auto-wakeup from Halt, Wait and Slow

On-chip peripherals
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When a break function is activated (BAx bit =1 and BREN1/BREN2 =1):
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When the break function is deactivated after applying the break (BAx bit go from 1 to 0 by
software), Timer takes the control of PWM ports.
Figure 43. ST7LITE49K2 block diagram of break function
Output compare mode
To use this function, load a 12-bit value in the Preload DCRxH and DCRxL registers.
Comparator2
BREAK2 pin
BREAKCR2 register
BR2SEL BR2EDGE
The break pattern (PWM[3:0] bits in the BREAKCR1) is forced directly on the PWMx
output pins if respective OEx is set. (after the inverter).
The 12-bit PWM counter CNTR1 is put to its reset value, i.e. 00h (if BREN1 = 1).
The 12-bit PWM counter CNTR2 is put to its reset value,i.e. 00h (if BREN2 = 1).
ATR1, ATR2, Preload and Active DCRx are put to their reset values.
Counters stop counting.
Comparator1
BREAK1 pin
BA2
BR1SEL
BP2EN
Level
Selection
BR1EDGE
Level
Selection
0
1
-
0
1
BA1
-
SWBR2
BP1EN
BREN1 bit
BREN2 bit
SWBR1
PWM3
BREAKCR1 register
ENCNTR2 bit
PWM2
PWM0/1 Break Enable
PWM2
PWM3
PWM0
PWM1
PWM1
PWM2/3 Break Enable
PWM0
(Inverters)
OEx
ST7LITE49K2
PWM0
PWM1
PWM2
PWM3