ST7LITE49K2 STMicroelectronics, ST7LITE49K2 Datasheet - Page 174
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ST7LITE49K2
Manufacturer Part Number
ST7LITE49K2
Description
8-bit MCU
Manufacturer
STMicroelectronics
Datasheet
1.ST7LITE49K2.pdf
(245 pages)
Specifications of ST7LITE49K2
8 Kbytes Single Voltage Extended Flash (xflash) Program Memory With Read-out Protection In-circuit Programming And In-application Programming (icp And Iap) Endurance
10K write/erase cycles guaranteed Data retention
256 Bytes Data Eeprom With Read-out Protection. 300k Write/erase Cycles Guaranteed, Data Retention
20 years at 55 °C.
Clock Sources
Internal trimmable 8 MHz RC oscillator, auto-wakeup internal low power - low frequency oscillator, crystal/ceramic resonator or external clock
Five Power Saving Modes
Halt, Active-halt, Auto-wakeup from Halt, Wait and Slow
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On-chip peripherals
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Register description
Control/status register (ADCCSR)
Reset value: 0000 0000 (00h)
Bit 7 = EOC End of conversion bit
Bit 6 = SPEED ADC clock selection bit
Bit 5 = ADON A/D converter ON bit
Bit 4 = Reserved, must be kept cleared.
Bits 3:0 = CH[3:0] Channel selection
Table 55.
1. The number of channels is device dependent. Refer to the device pinout description.
Read only
EOC
This bit is set by hardware. It is cleared by hardware when software reads the ADCDRH
register or writes to any bit of the ADCCSR register.
0: Conversion is not complete
1: Conversion complete
This bit is set and cleared by software. It is used together with the SLOW bit to
configure the ADC clock speed. Refer to the table in the SLOW bit description
(ADCDRL register).
This bit is set and cleared by software.
0: A/D converter is switched off
1: A/D converter is switched on
These bits select the analog input to convert. They are set and cleared by software.
7
Channel selection using CH[3:0]
Channel pin
SPEED
AIN0
AIN1
AIN2
AIN3
AIN4
AIN5
AIN6
AIN7
AIN8
AIN9
(1)
ADON
0
CH3
Read/write
0
0
0
0
0
0
0
0
1
1
CH3
CH2
0
0
0
0
1
1
1
1
0
0
CH2
CH1
CH1
0
0
1
1
0
0
1
1
0
0
ST7LITE49K2
CH0
CH0
0
1
0
1
0
1
0
1
0
1
0
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