ST7LITE49K2 STMicroelectronics, ST7LITE49K2 Datasheet - Page 167
ST7LITE49K2
Manufacturer Part Number
ST7LITE49K2
Description
8-bit MCU
Manufacturer
STMicroelectronics
Datasheet
1.ST7LITE49K2.pdf
(245 pages)
Specifications of ST7LITE49K2
8 Kbytes Single Voltage Extended Flash (xflash) Program Memory With Read-out Protection In-circuit Programming And In-application Programming (icp And Iap) Endurance
10K write/erase cycles guaranteed Data retention
256 Bytes Data Eeprom With Read-out Protection. 300k Write/erase Cycles Guaranteed, Data Retention
20 years at 55 °C.
Clock Sources
Internal trimmable 8 MHz RC oscillator, auto-wakeup internal low power - low frequency oscillator, crystal/ceramic resonator or external clock
Five Power Saving Modes
Halt, Active-halt, Auto-wakeup from Halt, Wait and Slow
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ST7LITE49K2
Bit 2 = CPHA Clock phase.
Bits 1:0 = SPR[1:0] Serial clock frequency.
Table 52.
This bit is set and cleared by software.
0: The first clock transition is the first data capture edge.
1: The second clock transition is the first capture edge.
The slave must have the same CPOL and CPHA settings as the master.
These bits are set and cleared by software. Used with the SPR2 bit, they select the
baud rate of the SPI serial clock SCK output by the SPI in master mode.
These 2 bits have no effect in slave mode.
Serial clock
f
f
f
f
CPU
f
f
CPU
CPU
CPU
CPU
CPU
SPI Master mode SCK frequency
/128
/16
/32
/64
/4
/8
SPR2
1
0
0
1
0
0
SPR1
0
0
0
1
1
1
On-chip peripherals
SPR0
0
0
1
0
0
1
167/245
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