ST7LITE49K2 STMicroelectronics, ST7LITE49K2 Datasheet - Page 89

• Manufacturer Part Number: ST7LITE49K2
• Description: 8-bit MCU
• Manufacturer: STMicroelectronics

Specifications of ST7LITE49K2

• 8 Kbytes Single Voltage Extended Flash (xflash) Program Memory With Read-out Protection In-circuit Programming And In-application Programming (icp And Iap) Endurance: 10K write/erase cycles guaranteed Data retention
• 256 Bytes Data Eeprom With Read-out Protection. 300k Write/erase Cycles Guaranteed, Data Retention: 20 years at 55 °C.
• Clock Sources: Internal trimmable 8 MHz RC oscillator, auto-wakeup internal low power - low frequency oscillator, crystal/ceramic resonator or external clock
• Five Power Saving Modes: Halt, Active-halt, Auto-wakeup from Halt, Wait and Slow

ST7LITE49K2
Figure 42. Dead time generation
In the above example, when the DTE bit is set:
●
●
With this programmable delay (Tdt), the PWM0 and PWM1 signals which are generated are
not overlapped.
Break function
The break function can be used to perform an emergency shutdown of the application being
driven by the PWM signals.
The break function is activated by the external BREAKx pins. This can be selected by using
the BRxSEL bits in BREAKCRx register. In order to use the break function it must be
previously enabled by software setting the BPENx bits in the BREAKCRx registers.
The Break active level can be programmed by the BRxEDGE bits in the BREAKCRx
registers. When an active level is detected on the BREAKx pins, the BAx bits are set and the
break function is activated. In this case, the PWM signals are forced to BREAK value if
respective OEx bit is set in PWMCR register.
Software can set the BAx bits to activate the break function without using the BREAKx pins.
The BREN1 and BREN2 bits in the BREAKEN register are used to enable the break
activation on the 2 counters respectively. In Dual Timer mode, the break for PWM2 and
PWM3 is enabled by the BREN2 bit. In Single Timer mode, the BREN1 bit enables the
break for all PWM channels.
CK_CNTR1
CNTR1
PWM goes low at DCR0 match and goes high at ATR1+Tdt
PWM1 goes high at DCR0+Tdt and goes low at ATR match.
PWM 1
PWM 0
PWM 0
PWM 1
counter = DCR0
DCR0
DCR0+1
T
counter1
T
dt
counter = DCR1
OVF
T
dt
= DT[6:0] x T
ATR1
counter1
T
dt
On-chip peripherals
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