ST7LITE49K2 STMicroelectronics, ST7LITE49K2 Datasheet - Page 87

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ST7LITE49K2

Manufacturer Part Number
ST7LITE49K2
Description
8-bit MCU
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST7LITE49K2

8 Kbytes Single Voltage Extended Flash (xflash) Program Memory With Read-out Protection In-circuit Programming And In-application Programming (icp And Iap) Endurance
10K write/erase cycles guaranteed Data retention
256 Bytes Data Eeprom With Read-out Protection. 300k Write/erase Cycles Guaranteed, Data Retention
20 years at 55 °C.
Clock Sources
Internal trimmable 8 MHz RC oscillator, auto-wakeup internal low power - low frequency oscillator, crystal/ceramic resonator or external clock
Five Power Saving Modes
Halt, Active-halt, Auto-wakeup from Halt, Wait and Slow

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ST7LITE49K2
Figure 39. PWM polarity inversion
The Data Flip Flop (DFF) applies the polarity inversion when triggered by the counter
overflow input.
Figure 40. PWM function
The maximum value of ATR is 4094 because it must be lower than the DCR value
which must be 4095 in this case.
Polarity inversion
The polarity bits can be used to invert any of the four output signals. The inversion is
synchronized with the counter overflow if the corresponding transfer bit in the ATCSR2
register is set (reset value). See
Output control
The PWMx output signals can be enabled or disabled using the OEx bits in the
PWMCR register.
AUTO-RELOAD
DUTY CYCLE
WITH OE=1
AND OPx=0
REGISTER
REGISTER
WITH OE=1
AND OPx=1
(DCRx)
(ATR)
4095
000
ATCSR2 register
PWMxCSR register
PWMx
inverter
TRANx
OPx
overflow
counter
Figure
39.
DFF
PWMx
PIN
On-chip peripherals
87/245
t

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