ST7LITE49K2 STMicroelectronics, ST7LITE49K2 Datasheet - Page 207

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ST7LITE49K2

Manufacturer Part Number
ST7LITE49K2
Description
8-bit MCU
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST7LITE49K2

8 Kbytes Single Voltage Extended Flash (xflash) Program Memory With Read-out Protection In-circuit Programming And In-application Programming (icp And Iap) Endurance
10K write/erase cycles guaranteed Data retention
256 Bytes Data Eeprom With Read-out Protection. 300k Write/erase Cycles Guaranteed, Data Retention
20 years at 55 °C.
Clock Sources
Internal trimmable 8 MHz RC oscillator, auto-wakeup internal low power - low frequency oscillator, crystal/ceramic resonator or external clock
Five Power Saving Modes
Halt, Active-halt, Auto-wakeup from Halt, Wait and Slow

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ST7LITE49K2
13.6
Figure 97. SPI master timing diagram
1. Measurement points are done at CMOS levels: 0.3xV
2. When no communication is on-going the data output line of the SPI (MOSI in master mode, MISO in slave
Clock and timing characteristics
Subject to general operating conditions for V
Table 83.
1. Guaranteed by Design. Not tested in production.
2. Data based on typical application software.
3. Time measured between interrupt event and interrupt vector fetch. Δt
Symbol
t
c(INST)
t
mode) has its alternate function capability released. In this case, the pin status depends of the I/O port
configuration.
v(IT)
needed to finish the current instruction execution.
MISO
MOSI
SS
CPHA = 0
CPOL = 0
CPHA = 0
CPOL = 1
CPHA = 1
CPOL = 0
CPHA = 1
CPOL = 1
INPUT
OUTPUT
INPUT
Interrupt reaction time
General timings
Instruction cycle time
t
v(IT)
See note 2
Parameter
= Δt
c(INST)
t
su(MI)
(1)
+ 10
MSB OUT
(3)
t
MSB IN
h(MI)
t
c(SCK)
t
t
t
v(MO)
w(SCKH)
w(SCKL)
f
f
CPU
CPU
Conditions
DD
DD
BIT6 OUT
, f
= 8 MHz
= 8 MHz
BIT6 IN
and 0.7xV
OSC
, and T
DD
t
h(MO)
c(INST)
.
A
.
1.25
Min
250
10
2
is the number of t
t
t
Electrical characteristics
r(SCK)
f(SCK)
LSB OUT
Typ
LSB IN
375
3
(2)
1500
Max
2.75
CPU
12
22
See note 2
cycles
207/245
Unit
t
t
CPU
CPU
ns
μs

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