STM32W108CZ STMicroelectronics, STM32W108CZ Datasheet - Page 96
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STM32W108CZ
Manufacturer Part Number
STM32W108CZ
Description
High-performance, IEEE 802.15.4 wireless system-on-chip with embedded Flash memory
Manufacturer
STMicroelectronics
Datasheet
1.STM32W108CC.pdf
(232 pages)
Specifications of STM32W108CZ
Receive Current (w/ Cpu)
27 mA
Transmit Current (w/ Cpu, +3 Dbm Tx)
31 mA
Low Deep Sleep Current, With Retained Ram And Gpio
400 nA/800 nA with/without sleep timer
Standard Arm Debug Capabilities
Flash patch & breakpoint; data watchpoint & trace; instrumentation trace macrocell
Single Voltage Operation
2.1-3.6 V with internal 1.8 V and 1.25 V regulators
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Serial interfaces
9.8.3
Table 54.
96/232
Reser
ved
31
15
INT_S
RERR
C1PA
30
14
rw
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Serial controller interrupt configuration register (INT_SCxCFG)
Address offset: 0xA848 (INT_SC1CFG) and 0xA84C (INT_SC2CFG)
Reset value:
Serial controller interrupt configuration register (INT_SCxCFG)
MERR
INT_S
Bit 4 INT_SCTXUND: Transmit buffer underrun interrupt pending.
Bit 3 INT_SCRXOVF: Receive buffer overrun interrupt pending.
Bit 2 INT_SCTXIDLE: Transmitter idle interrupt pending.
Bit 1 INT_SCTXFREE: Transmit buffer free interrupt pending.
Bit 0 INT_SCRXVAL: Receive buffer has data interrupt pending.
C1FR
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
29
13
rw
INT_SC1PARERR: Parity error received (UART) interrupt enable.
INT_SC1FRMERR: Frame error received (UART) interrupt enable.
INT_SCTXULDB: DMA transmit buffer B unloaded interrupt enable.
INT_SCTXULDA: DMA transmit buffer A unloaded interrupt enable.
INT_SCRXULDB: DMA receive buffer B unloaded interrupt enable.
INT_SCRXULDA: DMA receive buffer A unloaded interrupt enable.
INT_SCNAK: NACK received (I
INT_SCCMDFIN: START/STOP command complete (I
INT_SCTXFIN: Transmit operation complete (I
INT_SCRXFIN: Receive operation complete (I
INT_SCTXUND: Transmit buffer underrun interrupt enable.
INT_SCRXOVF: Receive buffer overrun interrupt enable.
INT_SCTXIDLE: Transmitter idle interrupt enable.
INT_SCTXFREE: Transmit buffer free interrupt enable.
INT_SCRXVAL: Receive buffer has data interrupt enable.
INT_S
CTXU
LDB
28
12
rw
INT_S
CTXU
LDA
27
11
rw
0x0000 0000
INT_S
CRXU
LDB
26
10
rw
STM32W108HB STM32W108CC STM32W108CB STM32W108CZ
INT_S
CRXU
LDA
25
rw
9
Doc ID 16252 Rev 13
INT_S
CNAK
24
rw
2
8
C) interrupt enable.
Reserved
CCMD
INT_S
FIN
23
rw
7
CTXFI
INT_S
22
rw
2
2
N
6
C) interrupt enable.
C) interrupt enable.
INT_SC
RXFIN
21
rw
5
2
C) interrupt enable.
INT_S
CTXU
ND
20
rw
4
INT_S
CRXO
VF
19
rw
3
CTXID
INT_S
18
LE
rw
2
CTXFR
INT_S
EE
17
rw
1
CRXVA
INT_S
16
rw
0
L
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