STM32W108CZ STMicroelectronics, STM32W108CZ Datasheet - Page 79
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STM32W108CZ
Manufacturer Part Number
STM32W108CZ
Description
High-performance, IEEE 802.15.4 wireless system-on-chip with embedded Flash memory
Manufacturer
STMicroelectronics
Datasheet
1.STM32W108CC.pdf
(232 pages)
Specifications of STM32W108CZ
Receive Current (w/ Cpu)
27 mA
Transmit Current (w/ Cpu, +3 Dbm Tx)
31 mA
Low Deep Sleep Current, With Retained Ram And Gpio
400 nA/800 nA with/without sleep timer
Standard Arm Debug Capabilities
Flash patch & breakpoint; data watchpoint & trace; instrumentation trace macrocell
Single Voltage Operation
2.1-3.6 V with internal 1.8 V and 1.25 V regulators
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STM32W108HB STM32W108CC STM32W108CB STM32W108CZ
9.3.1
Table 42.
Setup and configuration
Both serial controllers, SC1 and SC2, support SPI master mode. SPI master mode is
enabled by the following register settings:
●
●
●
The SPI serial clock (SCLK) is produced by a programmable clock generator. The serial
clock is produced by dividing down 12 MHz according to this equation:
EXP is the value written to the SCx_RATEEXP register and LIN is the value written to the
SCx_RATELIN register. The SPI master mode clock may not exceed 6 Mbps, so EXP and
LIN cannot both be zero.
The SPI master controller supports various frame formats depending upon the clock polarity
(SC_SPIPOL), clock phase (SC_SPIPHA), and direction of data (SC_SPIORD) (see
master mode formats on page
are defined within the SCx_SPICFG register.
Direction
GPIO
configuration
SC1 pin
SC2 pin
Parameter
The serial controller mode register (SCx_MODE) is ‘2’.
The SC_SPIMST bit in the SPI configuration register (SCx_SPICFG) is ‘1’.
The SC_TWIACK bit in the I
SPI master GPIO usage
Alternate Output
(push-pull)
Output
MOSI
PB1
PA0
Doc ID 16252 Rev 13
80). The bits SC_SPIPOL, SC_SPIPHA, and SC_SPIORD
Rate
2
C control register (SCx_TWICTRL2) is ‘1’.
=
---------------------------------------- -
(
LIN
12MHz
+
MISO
Input
Input
PB2
1
PA1
)x2
EXP
Alternate Output (push-pull)
Special SCLK mode
Serial interfaces
Output
SCLK
PB3
PA2
SPI
79/232
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