STM32W108CZ STMicroelectronics, STM32W108CZ Datasheet - Page 23
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STM32W108CZ
Manufacturer Part Number
STM32W108CZ
Description
High-performance, IEEE 802.15.4 wireless system-on-chip with embedded Flash memory
Manufacturer
STMicroelectronics
Datasheet
1.STM32W108CC.pdf
(232 pages)
Specifications of STM32W108CZ
Receive Current (w/ Cpu)
27 mA
Transmit Current (w/ Cpu, +3 Dbm Tx)
31 mA
Low Deep Sleep Current, With Retained Ram And Gpio
400 nA/800 nA with/without sleep timer
Standard Arm Debug Capabilities
Flash patch & breakpoint; data watchpoint & trace; instrumentation trace macrocell
Single Voltage Operation
2.1-3.6 V with internal 1.8 V and 1.25 V regulators
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STM32W108HB STM32W108CC STM32W108CB STM32W108CZ
Table 2.
Package
Pin no.
48-Pin
31
32
33
Package
Pin no.
40-Pin
Pin descriptions (continued)
26
27
28
PB2
SC1MISO
SC1MOSI
SC1SCL
SC1RXD
TIM2_CH2
(see also Pin
25)
SWCLK
JTCK
PC2
JTDO
SWO
Signal
Direction
I/O
I/O
I/O
I/O
O
O
O
I
I
I
I
I
Doc ID 16252 Rev 13
Digital I/O
SPI master data in of Serial Controller 1
Select SPI with SC1_MODE
Select master with SC1_SPICR
SPI slave data in of Serial Controller 1
Select SPI with SC1_MODE
Select slave with SC1_SPICR
I
Either disable timer output in TIM2_CCER,
or disable remap with TIM2_OR[5]
Select I
Select alternate open-drain output function with
GPIO_PBCFGL[11:8]
UART receive data of Serial Controller 1
Select UART with SC1_MODE
Timer 2 channel 2 output
Enable remap with TIM2_OR[5]
Enable timer output in TIM2_CCER
Select alternate output function with GPIO_PBCFGL[11:8]
Timer 2 channel 2 input. Enable remap with TIM2_OR[5].
Serial Wire clock input/output with debugger
Selected when in Serial Wire mode (see JTMS description,
Pin 35)
JTAG clock input from debugger
Selected when in JTAG mode (default mode, see JTMS
description, Pin 35)
Internal pull-down is enabled
Digital I/O
Enable with GPIO_DBGCFG[5]
JTAG data out to debugger
Selected when in JTAG mode (default mode, see JTMS
description, Pin 35)
Serial Wire Output asynchronous trace output to debugger
Select asynchronous trace interface in ARM core
Enable trace interface in ARM core
Select alternate output function with GPIO_PCCFGL[11:8]
Enable Serial Wire mode (see JTMS description, Pin 35)
Internal pull-up is enabled
2
C clock of Serial Controller 1
2
C with SC1_MODE
Description
Pinout and pin description
23/232
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