STM32W108CZ STMicroelectronics, STM32W108CZ Datasheet - Page 103
STM32W108CZ
Manufacturer Part Number
STM32W108CZ
Description
High-performance, IEEE 802.15.4 wireless system-on-chip with embedded Flash memory
Manufacturer
STMicroelectronics
Datasheet
1.STM32W108CC.pdf
(232 pages)
Specifications of STM32W108CZ
Receive Current (w/ Cpu)
27 mA
Transmit Current (w/ Cpu, +3 Dbm Tx)
31 mA
Low Deep Sleep Current, With Retained Ram And Gpio
400 nA/800 nA with/without sleep timer
Standard Arm Debug Capabilities
Flash patch & breakpoint; data watchpoint & trace; instrumentation trace macrocell
Single Voltage Operation
2.1-3.6 V with internal 1.8 V and 1.25 V regulators
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STM32W108HB STM32W108CC STM32W108CB STM32W108CZ
9.12.2
Table 65.
31
15
30
14
UART configuration register (SC1_UARTCFG)
Address offset: 0xC85C
Reset value:
UART configuration register (SC1_UARTCFG)
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
29
13
SC_UARTAUTO: Set this bit to enable automatic nRTS control by hardware (SC_UARTFLOW
must also be set). When automatic control is enabled, nRTS will be deasserted when the
receive FIFO has space for only one more byte (inhibits transmission from the other device)
and will be asserted if it has space for more than one byte (enables transmission from the other
device). The SC_UARTRTS bit in this register has no effect if this bit is set.
SC_UARTFLOW: Set this bit to enable using nRTS/nCTS flow control signals. Clear this bit to
disable the signals. When this bit is clear, the UART transmitter will not be inhibited by nCTS.
SC_UARTODD: If parity is enabled, specifies the kind of parity.
0: Even parity.
SC_UARTPAR: Specifies whether to use parity bits.
0: Don't use parity.
SC_UART2STP: Number of stop bits transmitted.
0: 1 stop bit.
SC_UART8BIT: Number of data bits.
0: 7 data bits.
SC_UARTRTS: nRTS is an output to control the flow of serial data sent to the STM32W108
from another device. This bit directly controls the output at the nRTS pin (SC_UARTFLOW must
be set and SC_UARTAUTO must be cleared). When this bit is set, nRTS is asserted (pin is low,
'XON', RS232 positive voltage); the other device's transmission is enabled. When this bit is
cleared, nRTS is deasserted (pin is high, 'XOFF', RS232 negative voltage), the other device's
transmission is inhibited.
28
12
Reserved
27
11
0x0000 0000
26
10
25
9
1: Odd parity.
1: Use parity.
1: 2 stop bits.
1: 8 data bits.
Doc ID 16252 Rev 13
24
8
Reserved
23
7
SC_UA
RTAUT
22
rw
O
6
SC_UA
RTFLO
21
rw
W
5
ARTO
SC_U
DD
20
rw
4
SC_UA
RTPAR
19
rw
3
SC_UA
RT2ST
Serial interfaces
18
rw
P
2
SC_UA
RT8BI
17
rw
1
T
103/232
SC_UA
RTRTS
16
rw
0
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