STM32W108CZ STMicroelectronics, STM32W108CZ Datasheet - Page 38

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STM32W108CZ

Manufacturer Part Number
STM32W108CZ
Description
High-performance, IEEE 802.15.4 wireless system-on-chip with embedded Flash memory
Manufacturer
STMicroelectronics
Datasheet

Specifications of STM32W108CZ

Receive Current (w/ Cpu)
27 mA
Transmit Current (w/ Cpu, +3 Dbm Tx)
31 mA
Low Deep Sleep Current, With Retained Ram And Gpio
400 nA/800 nA with/without sleep timer
Standard Arm Debug Capabilities
Flash patch & breakpoint; data watchpoint & trace; instrumentation trace macrocell
Single Voltage Operation
2.1-3.6 V with internal 1.8 V and 1.25 V regulators

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System modules
6.2.2
Note:
38/232
Deep sleep reset
The Power Management module informs the Reset Generation module of entry into and exit
from the deep sleep states. The deep sleep reset is applied in the following states: before
entry into deep sleep, while removing power from the memory and core domain, while in
deep sleep, while waking from deep sleep, and while reapplying power until reliable power
levels have been detect by POR LV.
The Power Management module allows a special emulated deep sleep state that retains
memory and core domain power while in deep sleep.
Reset recording
The STM32W108 records the last reset condition that generated a restart to the system.
The reset conditions recorded are:
The
All bits are mutually exclusive except the OPT_BYTE_FAIL bit which preserves the original
reset event when set.
While CPU Lockup is marked as a reset condition in software, CPU Lockup is not
specifically a reset event. CPU Lockup is set to indicate that the CPU entered an
unrecoverable exception. Execution stops but a reset is not applied. This is so that a
debugger can interpret the cause of the error. We recommend that in a live application (i.e.
no debugger attached) the watchdog be enabled by default so that the STM32W108 can be
restarted.
Reset event source register (RESET_EVENT)
POWER_HV
POWER_LV
RSTB
W_DOG
SW_RST
WAKE_UP_DSLEEP
OPT_BYTE_FAIL
STM32W108HB STM32W108CC STM32W108CB STM32W108CZ
Always-on domain power supply failure
Core or memory domain power supply failure
NRST pin asserted
Watchdog timer expired
Software reset by SYSERSETREQ from ARM® Cortex-M3
CPU
Wake-up from deep sleep
Error check failed when reading option bytes from Flash
memory
Doc ID 16252 Rev 13
is used to read back the last reset event.

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