STM32W108CZ STMicroelectronics, STM32W108CZ Datasheet - Page 90
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STM32W108CZ
Manufacturer Part Number
STM32W108CZ
Description
High-performance, IEEE 802.15.4 wireless system-on-chip with embedded Flash memory
Manufacturer
STMicroelectronics
Datasheet
1.STM32W108CC.pdf
(232 pages)
Specifications of STM32W108CZ
Receive Current (w/ Cpu)
27 mA
Transmit Current (w/ Cpu, +3 Dbm Tx)
31 mA
Low Deep Sleep Current, With Retained Ram And Gpio
400 nA/800 nA with/without sleep timer
Standard Arm Debug Capabilities
Flash patch & breakpoint; data watchpoint & trace; instrumentation trace macrocell
Single Voltage Operation
2.1-3.6 V with internal 1.8 V and 1.25 V regulators
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Serial interfaces
9.6.1
Note:
90/232
Setup and configuration
The UART baud rate clock is produced by a programmable baud generator starting from the
24 Hz clock:
The integer portion of the divisor, N, is written to the SC1_UARTPER register and the
fractional part, F, to the SC1_UARTFRAC register.
generate some common baud rates and their associated clock frequency error. The UART
requires an internal clock that is at least eight times the baud rate clock, so the minimum
allowable setting for SC1_UARTPER is ‘8’.
Table 50.
The UART may receive corrupt bytes if the interbyte gap is long or there is a baud rate
mismatch between receive and transmit. The UART may detect a parity and/or framing error
on the corrupt byte, but there will not necessarily be any error detected. As a result, the
device should be operated in systems where the other side of the communication link also
uses a crystal as its timing reference, and baud rates should be selected to minimize the
baud rate mismatch to the crystal tolerance. UART protocols should contain some form of
error checking (e.g. CRC) at the packet level to detect, and retry in the event of errors.
The UART character frame format is determined by three bits in the SC1_UARTCFG
register:
●
●
●
Baud rate (bits/sec)
SC1_UART2STP selects the number of stop bits in transmitted characters. (Only one
stop bit is ever required in received characters.) If this bit is clear, characters are
transmitted with one stop bit; if set, characters are transmitted with two stop bits.
SC1_UARTPAR controls whether or not received and transmitted characters include a
parity bit. If SC1_UARTPAR is clear, characters do not contain a parity bit, otherwise,
characters do contain a parity bit.
SC1_UARTODD specifies whether transmitted and received parity bits contain odd or
even parity. If this bit is clear, the parity bit is even, and if set, the parity bit is odd. Even
parity is the exclusive-or of all of the data bits, and odd parity is the inverse of the even
parity value. SC1_UARTODD has no effect if SC1_UARTPAR is clear.
115200
230400
460800
921600
19200
38400
57600
2400
4800
9600
300
UART baud rate divisors for common baud rates
STM32W108HB STM32W108CC STM32W108CB STM32W108CZ
SC1_UARTPER
Doc ID 16252 Rev 13
40000
5000
2500
1250
625
312
208
104
52
26
13
baud
=
2
24
N
MHz
SC1_UARTFRAC
+
Table 50
F
0
0
0
0
0
1
1
0
0
0
0
shows the values used to
Baud rate error (%)
+ 0.16
+ 0.16
+ 0.16
+ 0.16
- 0.08
0
0
0
0
0
0
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