STM32W108CZ STMicroelectronics, STM32W108CZ Datasheet - Page 40
STM32W108CZ
Manufacturer Part Number
STM32W108CZ
Description
High-performance, IEEE 802.15.4 wireless system-on-chip with embedded Flash memory
Manufacturer
STMicroelectronics
Datasheet
1.STM32W108CC.pdf
(232 pages)
Specifications of STM32W108CZ
Receive Current (w/ Cpu)
27 mA
Transmit Current (w/ Cpu, +3 Dbm Tx)
31 mA
Low Deep Sleep Current, With Retained Ram And Gpio
400 nA/800 nA with/without sleep timer
Standard Arm Debug Capabilities
Flash patch & breakpoint; data watchpoint & trace; instrumentation trace macrocell
Single Voltage Operation
2.1-3.6 V with internal 1.8 V and 1.25 V regulators
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System modules
6.2.4
Table 5.
40/232
31
15
30
14
Reset register
Reset event source register (RESET_EVENT)
Address offset: 0x4000 002C
Reset value: 0x0000 0001
Reset event source register (RESET_EVENT)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
29
13
OPT_BYTE_FAIL: When set to ‘1’, the reset is due to an Option byte load failure (may be set
with other bits).
WAKE_UP_DSLEEP: When set to ‘1’, the reset is due to a wake-up from Deep Sleep.
SW_RST: When set to ‘1’, the reset is due to a software reset.
W_DOG: When set to ‘1’, the reset is due to watchdog expiration.
RSTB_PIN: When set to ‘1’, the reset is due to an external reset pin signal.
POWER_LV: When set to ‘1’, the reset is due to the application of a Core power supply (or
previously failed).
POWER_HV: Always set to ‘1’, Normal power applied
CPU_LOCKUP: When set to ‘1’, the reset is due to core lockup.
28
12
Reserved
27
11
26
10
STM32W108HB STM32W108CC STM32W108CB STM32W108CZ
25
9
Doc ID 16252 Rev 13
24
8
Reserved
CPU_L
OCKU
23
P
7
r
OPT_B
YTE_F
AIL
22
6
r
WAKE_
UP_DS
LEEP
21
5
r
SW_
RST
20
4
r
DOG
W_
19
3
r
RSTB_
PIN
18
2
r
POWE
R_LV
17
1
r
POWE
R_HV
16
0
r
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