ADUC7126 Analog Devices, ADUC7126 Datasheet - Page 91

• Manufacturer Part Number: ADUC7126
• Description: Precision Analog Microcontroller, 12-Bit Analog I/O, Large Memory, ARM7TDMI MCU with Enhanced IRQ Handler
• Manufacturer: Analog Devices

Specifications of ADUC7126

• Mcu Core: ARM7 TDMI
• Mcu Speed (mips): 40
• Gpio Pins: 40
• Adc # Channels: 16
• Other: PWM

TIMERS
The ADuC7124/ADuC7126 have four general-purpose
timers/counters.
•
•
•
•
These four timers in their normal mode of operation can be
either free running or periodic.
In free-running mode, the counter decreases from the maxi-
mum value until zero scale is reached and starts again at the
minimum value. It also increases from the minimum value until
full scale is reached and starts again at the maximum value.
In periodic mode, the counter decrements/increments from the
value in the load register (TxLD MMR) until zero/full scale is
reached and starts again at the value stored in the load register.
The timer interval is calculated as follows:
The value of a counter can be read at any time by accessing
its value register (TxVAL). Note that, when a timer is being
clocked from a clock other than a core clock, an incorrect
value may be read (due to asynchronous clock system). In this
configuration, TxVAL should always be read twice. If the two
readings are different, it should be read a third time to obtain
the correct value.
Timers are started by writing in the control register of the
corresponding timer (TxCON).
In normal mode, an IRQ is generated each time the value of the
counter reaches zero when counting down. It is also generated
each time the counter value reaches full scale when counting
up. An IRQ can be cleared by writing any value to clear the
register of that particular timer (TxCLRI).
When using an asynchronous clock-to-clock timer, the
interrupt in the timer block can take more time to clear
than the time it takes for the code in the interrupt routine to
execute. Ensure that the interrupt signal is cleared before
leaving the interrupt service routine. This can be done by
checking the IRQSTA MMR.
Timer0
Timer1
Timer2 or wake-up timer
Timer3 or watchdog timer
Interval
=
(
TxD
Source
)
×
Prescaler
Clock
Rev. B | Page 91 of 104
Timer0 (RTOS Timer)
Timer0 is a general-purpose, 16-bit timer (count down) with a
programmable prescaler. The prescaler source is the core clock
frequency (HCLK) and can be scaled by a factor of 1, 16, or 256.
Timer0 can be used to start ADC conversions, as shown in the
block diagram in Figure 53.
OSCILLATOR
The Timer0 interface consists of four MMRs: T0LD, T0VAL,
T0CON, and T0CLRI.
T0LD Register
Name:
Address:
Default Value:
Access:
T0LD is a 16-bit load register.
T0VAL Register
Name:
Address:
Default Value:
Access:
T0VAL is a 16-bit read-only register representing the current
state of the counter.
T0CON Register
Name:
Address:
Default Value:
Access:
T0CON is the configuration MMR described in Table 140.
32.768kHz
UCLK
HCLK
Figure 53. Timer0 Block Diagram
÷1, 16, OR 256
PRESCALER
T0LD
0xFFFF0300
0x0000
Read/write
T0VAL
0xFFFF0304
0xFFFF
Read only
T0CON
0xFFFF0308
0x0000
Read/write
ADuC7124/ADuC7126
COUNTER
TIMER0
VALUE
DOWN
16-BIT
16-BIT
LOAD
TIMER0 IRQ
ADC CONVERSION