ADUC7126 Analog Devices, ADUC7126 Datasheet - Page 3

• Manufacturer Part Number: ADUC7126
• Description: Precision Analog Microcontroller, 12-Bit Analog I/O, Large Memory, ARM7TDMI MCU with Enhanced IRQ Handler
• Manufacturer: Analog Devices

Specifications of ADUC7126

• Mcu Core: ARM7 TDMI
• Mcu Speed (mips): 40
• Gpio Pins: 40
• Adc # Channels: 16
• Other: PWM

REVISION HISTORY
1/11—Rev A to Rev B
Change s to Table 1 ........................................................................... 5
10/10—Rev. 0 to Rev. A
Added ADuC7126 .............................................................. Universal
Changes to Features Section ............................................................ 1
Moved Figure 1 .................................................................................. 1
Changes to Figure 1 ........................................................................... 1
Changes to General Description Section ....................................... 4
Changes to Voltage Output at 25°C, Voltage TC, IOV
in Active Mode, and IOV
Table 1 ................................................................................................. 5
Change to Table 8 ............................................................................ 13
Changed REFGND to GND
Changes to Figure 7 and Table 9.................................................... 14
Added Figure 8 and Table 10; Renumbered Sequentially .......... 18
Change to Figure 17 Caption ......................................................... 25
Change to Memory Mapped Registers Section ........................... 29
Change to Figure 26 ........................................................................ 30
Changes to Table 18 ........................................................................ 32
Changes to Table 21 ........................................................................ 33
Changes to Table 22 ........................................................................ 34
Moved Table 25 ................................................................................ 35
Change to Table 25 .......................................................................... 35
Added Table 26 ................................................................................ 35
Change to Table 27 .......................................................................... 36
Changes to Temperature Sensor Section ...................................... 42
Deleted Table 59; Renumbered Sequentially ............................... 43
Added Downloading (In-Circuit Programming) via I
C Section ........................................................................................... 44
Change to JTAG Access Section and Table 37 ............................. 45
Changes to Table 45 ........................................................................ 46
Changes to RSTCFG Register Section .......................................... 49
Deleted Table 72 and Table 75 ....................................................... 49
Deleted Table 78 .............................................................................. 50
Changes to DAC Section, Table 62, and Table 64 ....................... 51
Changes to References to ADC and the DACs Setion, Table 66,
Configuring DAC Buffers in Op Amp Mode Section,
DACBCFG Register Section, and Table 67 .................................. 52
DD
Current in Pause Mode Parameters,
REF
...................................................... 13
DD
2
Current
Rev. B | Page 3 of 104
Added DACBKEY1 Register Section and DACBKEY2 Register
Section .............................................................................................. 53
Changes to Table 69 and Figure 45 ............................................... 54
Changes to and External Crystal Selection and External Clock
Selection ........................................................................................... 55
Changes to PLLCON Register and POWCON0 Register
Section .............................................................................................. 56
Changes to Table 78 ........................................................................ 58
Changes to Table 81 ........................................................................ 59
Changes to Table 84 and Table 90 ................................................. 60
Changes to Table 93, COM0FCR Register Section, COM1FCR
Register Section, and Table 94 ....................................................... 63
Changes to Serial Peripheral Interface Section ........................... 66
Change to SPI Registers Section.................................................... 67
Changes to SPIDIV Register Section and Table 101 .................. 68
Change to I
Change to Table 109 ........................................................................ 74
Change to I
Change to Table 113 ........................................................................ 79
Changes to Table 114 Title and Figure 50 .................................... 80
Change to IRQCLRE Register Register ....................................... 90
Change to Figure 54 ........................................................................ 92
Changes to Table 141, T1CLRI Register Section, and T1CAP
Register Section ............................................................................... 93
Changes to Table 143 ...................................................................... 94
Added External Memory Interfacting Section, Table 145,
Table 146, and Figure 57 ................................................................. 96
Added XMCFG Register Section, Table 147, Table 148,
Table 149, and Table 150 ................................................................ 97
Added Figure 58 and Figure 59 ..................................................... 98
Added Figure 60 and Figure 61 ..................................................... 99
Changes to Figure 62 to Figure 65 .............................................. 100
Changes to Figure 67 and Figure 68 ........................................... 101
Change to Power-On Reset Operation Section and
Figure 69 ......................................................................................... 102
Added Figure 71 ............................................................................ 103
Changes to Ordering Guide ......................................................... 104
9/10—Revision 0: Initial Version
2
2
C Master Transmit Register Section ....................... 73
C Slave Status Registers Section............................... 75
ADuC7124/ADuC7126