ADUC7126 Analog Devices, ADUC7126 Datasheet - Page 41

• Manufacturer Part Number: ADUC7126
• Description: Precision Analog Microcontroller, 12-Bit Analog I/O, Large Memory, ARM7TDMI MCU with Enhanced IRQ Handler
• Manufacturer: Analog Devices

Specifications of ADUC7126

• Mcu Core: ARM7 TDMI
• Mcu Speed (mips): 40
• Gpio Pins: 40
• Adc # Channels: 16
• Other: PWM

Single-Ended Mode
In single-ended mode, SW2 is always connected internally to
ground. The V
V
Analog Input Structure
Figure 36 shows the equivalent circuit of the analog input structure
of the ADC. The four diodes provide ESD protection for the analog
inputs. Care must be taken to ensure that the analog input
signals never exceed the supply rails by more than 300 mV; this
can cause these diodes to become forward-biased and start
conducting into the substrate. These diodes can conduct up to
10 mA without causing irreversible damage to the part.
The C1 capacitors in Figure 36 are typically 4 pF and can be
primarily attributed to pin capacitance. The resistors are
lumped components made up of the on resistance of the
switches. The value of these resistors is typically about 100 Ω.
The C2 capacitors are the sampling capacitors of the ADC and
typically have a capacitance of 16 pF.
Table 33. V
AV
3.3 V
3.0 V
AIN11
Figure 36. Equivalent Analog Input Circuit Conversion Phase: Switches Open,
AIN0
IN+
DD
is 0 V to V
MUX
CM
CHANNEL+
Ranges
IN−
REF
Figure 35. ADC in Single-Ended Mode
V
2.5 V
2.048 V
1.25 V
2.5 V
2.048 V
1.25 V
CHANNEL–
pin can be floating. The input signal range on
C1
C1
.
REF
Track Phase: Switches Closed
B
A
SW1
AV
AV
DD
DD
D
D
D
D
C
C
S
S
SW3
R1 C2
R1 C2
V
1.25 V
1.024 V
0.75 V
1.25 V
1.024 V
0.75 V
COMPARATOR
CM
Minimum
CAPACITIVE
CAPACITIVE
CONTROL
DAC
LOGIC
DAC
Rev. B | Page 41 of 104
V
2.05 V
2.276 V
2.55 V
1.75 V
1.976 V
2.25 V
CM
Maximum
For ac applications, removing high frequency components from
the analog input signal is recommended by using an RC low-
pass filter on the relevant analog input pins. In applications
where harmonic distortion and signal-to-noise ratio are critical,
the analog input should be driven from a low impedance
source. Large source impedances significantly affect the ac
performance of the ADC. This can necessitate the use of an
input buffer amplifier. The choice of the op amp is a function of
the particular application. Figure 37 and Figure 38 give an
example of the ADC front end.
When no amplifier is used to drive the analog input, the source
impedance should be limited to values lower than 1 kΩ. The
maximum source impedance depends on the amount of total
harmonic distortion (THD) that can be tolerated. The THD
increases as the source impedance increases and the performance
degrades.
DRIVING THE ANALOG INPUTS
Internal or external references can be used for the ADC. In
differential mode of operation, there are restrictions on the
common-mode input signal (V
the reference value and supply voltage used to ensure that the
signal remains within the supply rails. Table 33 gives some
calculated V
Figure 37. Buffering Single-Ended/Pseudo Differential Input
CM
V
REF
Signal Peak-to-Peak
2.5 V
2.048 V
1.25 V
2.5 V
2.048 V
1.25 V
minimum and V
Figure 38. Buffering Differential Inputs
10Ω
0.01µF
ADuC7124/ADuC7126
CM
CM
), which is dependent upon
maximum values.
ADuC7124/
ADuC7126
ADC0
ADC1
ADuC7124/
ADuC7126
ADC0