ADUC7126 Analog Devices, ADUC7126 Datasheet - Page 78

• Manufacturer Part Number: ADUC7126
• Description: Precision Analog Microcontroller, 12-Bit Analog I/O, Large Memory, ARM7TDMI MCU with Enhanced IRQ Handler
• Manufacturer: Analog Devices

Specifications of ADUC7126

• Mcu Core: ARM7 TDMI
• Mcu Speed (mips): 40
• Gpio Pins: 40
• Adc # Channels: 16
• Other: PWM

ADuC7124/ADuC7126
PWM GENERAL OVERVIEW
The ADuC7124/ADuC7126 integrate a 6-channel PWM
interface (PWM0 to PWM5). The PWM outputs can be
configured to drive an H-bridge or can be used as standard PWM
outputs. On power-up, the PWM outputs default to H-bridge
mode. This ensures that the motor is turned off by default. In
standard PWM mode, the outputs are arranged as three pairs of
PWM pins. The user has control over the period of each pair of
outputs and over the duty cycle of each individual output.
Table 112. PWM MMRs
Name
PWMCON0
PWM0COM0
PWM0COM1
PWM0COM2
PWM0LEN
PWM1COM0
PWM1COM1
PWM1COM2
PWM1LEN
PWM2COM0
PWM2COM1
PWM2COM2
PWM2LEN
PWMCON1
PWMCLRI
Function
PWM control.
Compare Register 0 for PWM Output 0 and
PWM Output 1.
Compare Register 1 for PWM Output 0 and
PWM Output 1.
Compare Register 2 for PWM Output 0 and
PWM Output 1.
Frequency control for PWM Output 0 and
PWM Output 1.
Compare Register 0 for PWM Output 2 and
PWM Output 3.
Compare Register 1 for PWM Output 2 and
PWM Output 3.
Compare Register 2 for PWM Output 2 and
PWM Output 3.
Frequency control for PWM Output 2 and
PWM Output 3.
Compare Register 0 for PWM Output 4 and
Output 5
Compare Register 1 for PWM Output 4 and
Output 5
Compare Register 2 for PWM Output 4 and
Output 5
Frequency control for PWM Output 4 and
PWM Output 5.
PWM control register
PWM interrupt clear.
Rev. B | Page 78 of 104
In all modes, the PWMxCOMx MMRs control the point at
which the PWM outputs change state. An example of the first pair
of PWM outputs (PWM0 and PWM1) is shown in Figure 49.
The PWM clock is selectable via PWMCON with one of the
following values: UCLK divided by 2, 4, 8, 16, 32, 64, 128, or
256. The length of a PWM period is defined by PWMxLEN.
The PWM waveforms are set by the count value of the 16-bit
timer and the compare registers contents, as shown with the
PWM0 and PWM1 waveforms in Figure 49.
The low-side waveform, PWM1, goes high when the timer
count reaches PWM0LEN, and it goes low when the timer
count reaches the value held in PWM0COM2 or when the
high-side waveform (PWM0) goes low.
The high-side waveform, PWM0, goes high when the timer
count reaches the value held in PWM0COM0, and it goes low
when the timer count reaches the value held in PWM0COM1.
HIGH SIDE
LOW SIDE
(PWM0)
(PWM1)
PWM0COM2
PWM0COM1
PWM0COM0
PWM0LEN
Figure 49. PWM Timing