ADUC7126 Analog Devices, ADUC7126 Datasheet - Page 22

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ADUC7126

Manufacturer Part Number
ADUC7126
Description
Precision Analog Microcontroller, 12-Bit Analog I/O, Large Memory, ARM7TDMI MCU with Enhanced IRQ Handler
Manufacturer
Analog Devices
Datasheet

Specifications of ADUC7126

Mcu Core
ARM7 TDMI
Mcu Speed (mips)
40
Gpio Pins
40
Adc # Channels
16
Other
PWM

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ADuC7124/ADuC7126
Pin No.
62
63
64
65
66
67
68
69
70
71
72
73, 74
75
76
77
78
79
80
Mnemonic
P1.1/SPM1/SOUT0/I2C0SDA/PLAI[1]
P1.0/T1/SPM0/SIN0/I2C0SCL/PLAI[0]
P4.2/AD10/PLAO[10]
P4.3/AD11/PLAO[11]
P4.4/AD12/PLAO[12]
P4.5/AD13/PLAO[13]/RTCK
IOV
IOGND
V
DAC
AV
AGND
GND
ADC11
ADC0
ADC1
ADC2/CMP0
ADC3/CMP1
REF
DD
DD
REF
REF
Description
General-Purpose Input and Output Port 1.1 (P1.1).
Serial Port Multiplexed (SPM1).
UART0 Output (SOUT0).
I2C0 (I2C0SDA).
Programmable Logic Array Input Element 1 (PLAI[1]).
General-Purpose Input and Output Port 1.0 (P1.0).
Timer1 Input (T1).
Serial Port Multiplexed (SPM0).
UART0 Input (SIN0).
I2C0 (I2C0SCL).
Programmable Logic Array Input Element 0 (PLAI[0]).
General-Purpose Input and Output Port 4.2 (P4.2).
External Memory Interface (AD10).
Programmable Logic Array Output Element 10 (PLAO[10]).
General-Purpose Input and Output Port 4.3 (P4.3).
External Memory Interface (AD11).
Programmable Logic Array Output Element 11 (PLAO[11]).
General-Purpose Input and Output Port 4.4 (P4.4).
External Memory Interface (AD12).
Programmable Logic Array Output Element 12 (PLAO[12]).
General-Purpose Input and Output Port 4.5 (P4.5).
External Memory Interface (AD13).
Programmable Logic Array Output Element 13 (PLAO[13]).
JTAG Return Test Clock (RTCK).
3.3 V Supply for GPIO and Input of the On-Chip Voltage Regulator.
Ground for GPIO. Typically connected to DGND.
2.5 V Internal Voltage Reference. Must be connected to a 0.47 µF capacitor when using
the internal reference.
External Voltage Reference for the DACs. Range: DACGND to DACV
3.3 V Analog Power.
Analog Ground. Ground reference point for the analog circuitry.
Ground Voltage Reference for the ADC. For optimal performance, the analog power
supply should be separated from IOGND and DGND.
Single-Ended or Differential Analog Input 11.
Single-Ended or Differential Analog Input 0.
Single-Ended or Differential Analog Input 1.
Single-Ended or Differential Analog Input 2 (ADC2).
Comparator Positive Input (CMP0).
Single-Ended or Differential Analog Input 3 (ADC3).
Comparator Negative Input (CMP1).
Rev. B | Page 22 of 104
DD
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