SAM3A4C Atmel Corporation, SAM3A4C Datasheet - Page 387
SAM3A4C
Manufacturer Part Number
SAM3A4C
Description
Manufacturer
Atmel Corporation
- Current page: 387 of 1465
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23.7.17
Name:
Address:
Access:
Reset:
This register can only be written if the WPEN bit is cleared in
• SRC_DSCR: Source Address Descriptor
0 (FETCH_FROM_MEM): Source address is updated when the descriptor is fetched from the memory.
1 (FETCH_DISABLE): Buffer Descriptor Fetch operation is disabled for the source.
• DST_DSCR: Destination Address Descriptor
0 (FETCH_FROM_MEM): Destination address is updated when the descriptor is fetched from the memory.
1 (FETCH_DISABLE): Buffer Descriptor Fetch operation is disabled for the destination.
• FC: Flow Control
This field defines which device controls the size of the buffer transfer, also referred to as the Flow Controller.
• SRC_INCR: Incrementing, Decrementing or Fixed Address for the Source
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
31
23
15
–
–
7
–
DMAC Channel x [x = 0..5] Control B Register
Value
Value
000
001
010
011
00
01
10
DMAC_CTRLBx [x = 0..5]
0x400C404C [0], 0x400C4074 [1], 0x400C409C [2], 0x400C40C4 [3], 0x400C40EC [4], 0x400C4114 [5]
Read-write
0x00000000
IEN
FC
30
22
14
–
6
–
MEM2MEM_DMA_FC
MEM2PER_DMA_FC
PER2MEM_DMA_FC
PER2PER_DMA_FC
DECREMENTING
INCREMENTING
29
21
13
5
Name
FIXED
Name
DST_INCR
–
DST_DSCR
28
20
12
–
4
Description
Memory-to-Memory Transfer DMAC is flow controller
Memory-to-Peripheral Transfer DMAC is flow controller
Peripheral-to-Memory Transfer DMAC is flow controller
Peripheral-to-Peripheral Transfer DMAC is flow controller
Description
The source address is incremented
The source address is decremented
The source address remains unchanged
“DMAC Write Protect Mode Register”
27
19
11
–
–
–
3
–
26
18
10
–
–
–
2
–
25
17
–
9
–
1
.
SRC_INCR
SAM3X/A
SAM3X/A
–
SRC_DSCR
24
16
8
–
0
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