SAM3A4C Atmel Corporation, SAM3A4C Datasheet - Page 1123
SAM3A4C
Manufacturer Part Number
SAM3A4C
Description
Manufacturer
Atmel Corporation
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39.6.2.4
Name:
Address:
Access:
• DMA_x: DMA Channel x Interrupt Set
Writing a one to this bit will set the corresponding bit in UOTGHS_DEVISR, which may be useful for test or debug
purposes.
Writing a zero to this bit has no effect.
This bit always reads as zero.
• UPRSMS: Upstream Resume Interrupt Set
Writing a one to this bit will set UPRSM bit in UOTGHS_DEVISR, which may be useful for test or debug purposes.
Writing a zero to this bit has no effect.
This bit always reads as zero.
• EORSMS: End of Resume Interrupt Set
Writing a one to this bit will set EORSM bit in UOTGHS_DEVISR, which may be useful for test or debug purposes.
Writing a zero to this bit has no effect.
This bit always reads as zero.
• WAKEUPS: Wake-Up Interrupt Set
Writing a one to this bit will set WAKEUP bit in UOTGHS_DEVISR, which may be useful for test or debug purposes.
Writing a zero to this bit has no effect.
This bit always reads as zero.
• EORSTS: End of Reset Interrupt Set
Writing a one to this bit will set EORST bit in UOTGHS_DEVISR, which may be useful for test or debug purposes.
Writing a zero to this bit has no effect.
This bit always reads as zero.
• SOFS: Start of Frame Interrupt Set
Writing a one to this bit will set SOF bit in UOTGHS_DEVISR, which may be useful for test or debug purposes.
Writing a zero to this bit has no effect.
This bit always reads as zero.
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
31
23
15
–
–
–
7
–
Device Global Interrupt Set Register
UOTGHS_DEVIFR
0x400AC00C
Write-only
UPRSMS
DMA_6
30
22
14
–
–
6
EORSMS
DMA_5
29
21
13
–
–
5
WAKEUPS
DMA_4
28
20
12
–
–
4
EORSTS
DMA_3
27
19
11
–
–
3
DMA_2
SOFS
26
18
10
–
–
2
MSOFS
DMA_1
25
17
–
9
–
1
SAM3X/A
SAM3X/A
SUSPS
24
16
–
–
8
–
0
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