SAM3A4C Atmel Corporation, SAM3A4C Datasheet - Page 361
SAM3A4C
Manufacturer Part Number
SAM3A4C
Description
Manufacturer
Atmel Corporation
- Current page: 361 of 1465
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11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
Figure 23-7. DMAC Transfer Flow for Source and Destination Linked List Address
– i. Set up the transfer type (memory or non-memory peripheral for source and
– i. Designate the handshaking interface type (hardware or software) for the source
destination) and flow control device by programming the FC of the DMAC_CTRLBx
register.
and destination peripherals. This is not required for memory. This step requires
programming the SRC_H2SEL/DST_h2SEL bits, respectively. Writing a ‘1’ activates
the hardware handshaking interface to handle source/destination requests for the
Chained Buffer Transfer Completed
Interrupt generated here
DMAC Chained Buffer Transfer
Completed Interrupt generated here
SADDRx, DADDRx, CTRLA/Bx, DSCRx
Writeback of DMAC_CTRLAx
DMAC State Machine Table?
register in system memory
Hardware reprograms
DMAC buffer transfer
Channel disabled by
Channel enabled by
Is DMAC in
Row 1 of
LLI Fetch
hardware
software
yes
no
SAM3X/A
SAM3X/A
361
361
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