SAM3A4C Atmel Corporation, SAM3A4C Datasheet - Page 1288
SAM3A4C
Manufacturer Part Number
SAM3A4C
Description
Manufacturer
Atmel Corporation
- Current page: 1288 of 1465
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41.6.4
Name:
Address:
Access:
This register, when read, provides details of the status of a transmit. Once read, individual bits may be cleared by writing 1
to them. It is not possible to set a bit to 1 by writing to the register.
• UBR: Used Bit Read
Set when a transmit buffer descriptor is read with its used bit set. Cleared by writing a one to this bit.
• COL: Collision Occurred
Set by the assertion of collision. Cleared by writing a one to this bit.
• RLES: Retry Limit exceeded
Cleared by writing a one to this bit.
• TGO: Transmit Go
If high transmit is active.
• BEX:
If the buffers run out during transmission of a frame, then transmission stops, FCS shall be bad and tx_er asserted. Cleared
by writing a one to this bit.
• COMP: Transmit Complete
Set when a frame has been transmitted. Cleared by writing a one to this bit.
• UND: Transmit Underrun
Set when transmit DMA was not able to read data from memory, either because the bus was not granted in time, because
a not OK hresp(bus error) was returned or because a used bit was read midway through frame transmission. If this
occurs, the transmitter forces bad CRC. Cleared by writing a one to this bit.
1288
1288
31
23
15
–
–
–
7
–
Buffers exhausted mid frame
SAM3X/A
SAM3X/A
Transmit Status Register
EMAC_TSR
0x400B0014
Read-write
UND
30
22
14
–
–
–
6
COMP
29
21
13
–
–
–
5
BEX
28
20
12
–
–
–
4
TGO
27
19
11
–
–
–
3
RLES
26
18
10
–
–
–
2
COL
25
17
–
–
9
–
1
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
UBR
24
16
–
–
8
–
0
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