ATxmega128A3U Atmel Corporation, ATxmega128A3U Datasheet - Page 357
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ATxmega128A3U
Manufacturer Part Number
ATxmega128A3U
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega128A3U
Flash (kbytes)
128 Kbytes
Pin Count
64
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
50
Ext Interrupts
50
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
10
Twi (i2c)
2
Uart
7
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
8
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
7
Output Compare Channels
22
Input Capture Channels
22
Pwm Channels
22
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATxmega128A3U-AU
Manufacturer:
ATMEL
Quantity:
39
Company:
Part Number:
ATxmega128A3U-MH
Manufacturer:
ATMEL
Quantity:
1
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28.4
8331A–AVR–07/11
ADC Channels
The internal signals need to be turned on specifically before they can be measured. Refer to
their manual description for details of how to turn these off. The sample rate for the internal sig-
nals is lower than that of ADC, refer to the ADC characteristics in the device datasheets for
details.
When measuring the internal signals, the negative input is connected to internal ground in single
ended signed mode.
Figure 28-6. Internal measurements in single ended signed mode
To measure the internal signals in unsigned mode, the negative input is connected to a fixed
value given by the below formula, which is half of the voltage reference (VREF) minus a fixed
offset as it is for single ended unsigned input. Refer to
V
Figure 28-7. Internal measurements in unsigned mode
To facilitate the maximum utilization of ADC, it has four separate pairs of MUX control registers
with corresponding result registers. Each pair forms an ADC channel. See
354. The ADC can then keep and use four parallel configurations of input sources and triggers.
Each channel with a dedicated result registers, events and interrupts, and DMA triggers.
As an example of the ADC channel usage, one channel can be setup for single-ended measure-
ments triggered by event channel, the second channel can measure a differential input using a
different event, and the two last channels can measure two other input sources started by the
application software.
All the ADC channels use the same ADC pipeline for the conversions, and the pipelined enable
a new conversion to be started for each ADC clock cycle. This means that multiple ADC conver-
sions from different Channels can progressevely occur simultaneously and independently. The
channels' result registers are individually updated and are unaffected by conversions on other
INN
= V
REF
BANDGAP REF
/2 - ΔV
VCC SCALED
VCC SCALED
TEMP REF
BANDGAP
TEMP REF
DAC
DAC
VREF
2
−
Δ
Atmel AVR XMEGA AU
V
Figure 28-11 on page 359
+
-
+
-
Figure 28-1 on page
for details.
357
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