ATxmega128A3U Atmel Corporation, ATxmega128A3U Datasheet - Page 256
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ATxmega128A3U
Manufacturer Part Number
ATxmega128A3U
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega128A3U
Flash (kbytes)
128 Kbytes
Pin Count
64
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
50
Ext Interrupts
50
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
10
Twi (i2c)
2
Uart
7
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
8
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
7
Output Compare Channels
22
Input Capture Channels
22
Pwm Channels
22
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATxmega128A3U-AU
Manufacturer:
ATMEL
Quantity:
39
Company:
Part Number:
ATxmega128A3U-MH
Manufacturer:
ATMEL
Quantity:
1
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20.14.7
20.14.8
8331A–AVR–07/11
AUXDATAL – Auxiliary Data Low Byte
AUXDATAH – Auxiliary Data High Byte
• Bit 15:0 - DPTR[15:8]: Endpoint Data Pointer High Byte
This byte contains the 8 MSB of the Endpoint Data Pointer (DATAPTR).
The AUXDATAL and AUXDATAH registers represent the 16-bit value AUXDATA that is used for
multi-packet transfers.
For IN endpoints, AUXDATA holds the total number of bytes sent. AUXDATA should be written
to zero when setting up a new transfer. For OUT endpoints, AUXDATA holds the total data size
for the complete transfer. This value must be a multiple of the maximum packet size except for
ISO 1023 bytes endpoints.
See
transfer.
• Bit 7:0 – AUXDATA[7:0]: Auxiliary Data Low Byte
This byte contains the 8 LSB of the Auxiliary Data. When multi-packet transfer is not used, this
SRAM location is free to use for other application data.
• Bit 7:0 – AUXDATA[15:8]: Auxiliary Data High Byte
This byte contains the 8 MSB of the Auxiliary Data. When multi-packet transfer is not used, this
SRAM location is free to use for other application data.
Bit
+0x06
Read/Write
Initial Value
Bit
+0x07
Read/Write
Initial Value
”Multi-packet transfers” on page 240
R/W
R/W
7
X
7
X
R/W
R/W
X
X
6
6
R/W
R/W
X
X
5
5
R/W
R/W
for more details on setting up and using multi-packet
4
X
4
X
AUXDATA[15:8]
AUXDATA[7:0]
R/W
R/W
Atmel AVR XMEGA AU
3
X
3
X
R/W
R/W
X
X
2
2
R/W
R/W
X
X
1
1
R/W
R/W
0
X
0
X
AUXDATAH
AUXDATAL
256
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