AT32UC3C164C Atmel Corporation, AT32UC3C164C Datasheet - Page 144

• Manufacturer Part Number: AT32UC3C164C
• Manufacturer: Atmel Corporation

Specifications of AT32UC3C164C

• Flash (kbytes): 64 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 81
• Ext Interrupts: 100
• Usb Transceiver: 1
• Quadrature Decoder Channels: 2
• Usb Speed: Full Speed
• Usb Interface: Device + OTG
• Spi: 7
• Twi (i2c): 3
• Uart: 5
• Can: 2
• Lin: 5
• Ssc: 1
• Ethernet: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 4
• Dac Resolution (bits): 12
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 20
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6 or 4.5 to 5.5
• Operating Voltage (vcc): 3.0 to 3.6 or 4.5 to 5.5
• Fpu: Yes
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 22
• Input Capture Channels: 12
• Pwm Channels: 19
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

9.6.3
Name:
Access Type:
Offset:
Reset Value:
•
•
•
•
• PERn: Periodic n
• ALARMn: Alarm n
• OVF: Overflow
32117C–AVR-08/11
CLKREADY: Clock ready
CLKBUSY: Clock busy
READY: AST ready
BUSY: AST busy
31
23
15
7
-
-
-
-
This bit is cleared when the corresponding bit in SCR is written to one.
This bit is set when the SR.CLKBUSY bit has a 1-to-0 transition.
• 0: The clock is ready and can be changed.
• 1: CLOCK.CEN has been written and the clock is busy.
This bit is cleared when the corresponding bit in SCR is written to one.
This bit is set when the SR.BUSY bit has a 1-to-0 transition.
0: The AST accepts writes to CR, CV, SCR, WER, EVE, EVD, ARn, and PIRn, and DTR.
1: The AST is busy and will discard writes to CR, CV, SCR, WER, EVE, EVD, ARn, and PIRn, and DTR.
This bit is cleared when the corresponding bit in SCR is written to one.
This bit is set when the selected bit in the prescaler has a 0-to-1 transition.
This bit is cleared when the corresponding bit in SCR is written to one.
This bit is set when the counter reaches the selected alarm value.
This bit is cleared when the corresponding bit in SCR is written to one.
This bit is set when an overflow has occurred.
Status Register
30
22
14
6
-
-
-
-
SR
Read-only
0x08
0x00000000
CLKREADY
29
21
13
5
-
-
-
CLKBUSY
28
20
12
4
-
-
-
27
19
11
3
-
-
-
-
26
18
10
2
-
-
-
-
ALARM1
READY
PER1
25
17
9
1
-
AT32UC3C
ALARM0
BUSY
PER0
OVF
24
16
8
0
144