AT32UC3C164C Atmel Corporation, AT32UC3C164C Datasheet - Page 1120
AT32UC3C164C
Manufacturer Part Number
AT32UC3C164C
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(159 pages)
3.AT32UC3C0128C.pdf
(1313 pages)
4.AT32UC3C0128C.pdf
(108 pages)
Specifications of AT32UC3C164C
Flash (kbytes)
64 Kbytes
Pin Count
100
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
81
Ext Interrupts
100
Usb Transceiver
1
Quadrature Decoder Channels
2
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
7
Twi (i2c)
3
Uart
5
Can
2
Lin
5
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
4
Dac Resolution (bits)
12
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
20
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6 or 4.5 to 5.5
Operating Voltage (vcc)
3.0 to 3.6 or 4.5 to 5.5
Fpu
Yes
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
22
Input Capture Channels
12
Pwm Channels
19
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT32UC3C164C-AUR
Manufacturer:
ATMEL
Quantity:
1 240
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36.7.2
Name:
Access Type:
Offset:
Reset Value:
• SUT: Start-up Time
• MUXSET: Mux Settle Time
• EXREF: External Reference
• SHD: Sample-and-Hold Disabled
• RS: Reference Source
• FRM: Free Running Mode
32117C–AVR-08/11
SHD
31
23
15
7
-
-
-
Number of ADC clock cycles to wait for: (STARTUP + 1) * 32.
1: The multiplexers settle time is set to 0.5 PB clock periods.
0: The multiplexers settle time is set to 1.5 PB clock periods.
1: The external forcing of references is enabled, ADC references are the ADCREFN and ADCREFP pads.
0: The external forcing of references is disabled, ADC reference is given by the RS field.
1: The Sample and Hold is disabled.
0: The Sample and Hold is enabled.
note: when set to one, sequencer 1 is turned off, as a consequence the ADC pipeline latency is decreased by one ADC clock
period.
0: Internal 1V reference.
1: Internal 0.6 *VDDANA reference.
2: External reference ADCREF0 over chip analog ground.
3: External reference ADCREF1 over chip analog ground.
1: The free running mode is enabled, sequencer 0 performs conversions continuously.
0: The free running modeis disabled.
note: once in this mode, sequencer 1 requests cannot be serviced.
Configuration Register
30
22
14
6
-
-
-
CFG
Read/Write
0x04
0x00000000
RS
29
21
13
5
-
-
FRM
28
20
12
4
-
-
SSMQ
27
19
11
3
-
-
SUT
MUXSET
SLEEP
26
18
10
2
-
EXREF
25
17
9
1
-
-
AT32UC3C
ADCEN
24
16
8
0
-
-
1120
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