AT32UC3C1512C Atmel Corporation, AT32UC3C1512C Datasheet - Page 87

• Manufacturer Part Number: AT32UC3C1512C
• Manufacturer: Atmel Corporation

Specifications of AT32UC3C1512C

• Flash (kbytes): 512 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 81
• Ext Interrupts: 100
• Usb Transceiver: 1
• Quadrature Decoder Channels: 2
• Usb Speed: Full Speed
• Usb Interface: Device + OTG
• Spi: 7
• Twi (i2c): 3
• Uart: 5
• Can: 2
• Lin: 5
• Ssc: 1
• Ethernet: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 4
• Dac Resolution (bits): 12
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 68
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6 or 4.5 to 5.5
• Operating Voltage (vcc): 3.0 to 3.6 or 4.5 to 5.5
• Fpu: Yes
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 22
• Input Capture Channels: 12
• Pwm Channels: 19
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

8.5.7
8.5.8
8.5.9
32117C–AVR-08/11
5V Brown Out Detection (BOD50)
Bandgap
Voltage Regulators
If the JTAG or the AWIRE is enabled, the BOD33 reset and interrupt will be masked.
See Electrical Characteristics for parametric details.
To prevent unexpected writes due to software bugs, write access to this register is protected by
a locking mechanism, for details please refer to the UNLOCK register description.
The 5V Brown-Out Detector (BOD50) monitors the VDDIN_5 supply pin and compares the sup-
ply voltage to the brown-out detection level, as set in BOD50.LEVEL. The BOD50 is disabled by
default, but can be enabled by software. The 5V Brown-Out Detector can generate an interrupt
when the supply voltage is below the brown-out detection level. In any case, the BOD50 output
value is given by the PCLKSR.BOD50DET bit.
Note that any change to the BOD50.LEVEL field of the BOD50 register should be done with the
BOD50 deactivated to avoid spurious interrupt. When turned-on, the BOD50 output will be
masked during one half of a RCSYS clock cycle and two main clocks cycles to avoid false
results.
If the JTAG or the AWIRE is enabled, the BOD50 interrupt will be masked.
See Electrical Characteristics for parametric details.
To prevent unexpected writes due to software bugs, write access to this register is protected by
a locking mechanism, for details please refer to the UNLOCK register description.
The Flash memory, the Brown-Out Detectors need a stable voltage reference to operate. This
reference voltage is provided by an internal Bandgap voltage reference. This reference is auto-
matically turned on at startup and turned off during DEEPSTOP and STATIC sleep modes to
save power.
The Bandgap voltage reference is calibrated through the BGCR.CALIB field. This field is loaded
after a Power On Reset with default values stored in factory-programmed flash fuses.
It is not recommended to override default factory settings as it may prevent correct operation of
the Flash and BODs. To prevent unexpected writes due to software bugs, write access to this
register is protected by a locking mechanism, for details please refer to the UNLOCK register
description.
The embedded 1.8V regulator provides the core supply. The embedded 3.3V voltage regulator
is used to supply the USB pads. Both regulators are turned on at startup.
If the application is supplied with a voltage range around 3.3V or the application does not use
the USB interface, the 3.3V voltage regulator has to be turned off by writing 11 binary to
VREGCTRL.VREG33CTL.
The 1.8V voltage regulator has its own voltage reference that is calibrated through the
VREGCR.CALIB field. This field is loaded after a Power On Reset with default values stored in
factory-programmed flash fuses.
Although it is not recommended, it is still possible to override the default factory settings by writ-
ing to those registers. To prevent unexpected writes due to software bugs, write access to this
register is protected by a locking mechanism, for details please refer to the UNLOCK register
description.
AT32UC3C
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