AT32UC3C1512C Atmel Corporation, AT32UC3C1512C Datasheet - Page 570

• Manufacturer Part Number: AT32UC3C1512C
• Manufacturer: Atmel Corporation

Specifications of AT32UC3C1512C

• Flash (kbytes): 512 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 81
• Ext Interrupts: 100
• Usb Transceiver: 1
• Quadrature Decoder Channels: 2
• Usb Speed: Full Speed
• Usb Interface: Device + OTG
• Spi: 7
• Twi (i2c): 3
• Uart: 5
• Can: 2
• Lin: 5
• Ssc: 1
• Ethernet: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 4
• Dac Resolution (bits): 12
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 68
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6 or 4.5 to 5.5
• Operating Voltage (vcc): 3.0 to 3.6 or 4.5 to 5.5
• Fpu: Yes
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 22
• Input Capture Channels: 12
• Pwm Channels: 19
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

25.6.1.5
Table 25-4.
Table 25-5.
Table 25-6.
32117C–AVR-08/11
DI field
Di (decimal)
FI field
Fi (decimal
Fi/Di
16
32
12
20
1
2
4
8
Baud Rate in ISO 7816 Mode
23.25
11.62
46.5
18.6
Binary and Decimal Values for Di
Binary and Decimal Values for Fi
Possible Values for the Fi/Di Ratio
372
372
186
0000
93
31
372
0001
1
0001
139.5
69.75
34.87
17.43
372
46.5
27.9
558
558
279
In synchronous mode, if the external clock is selected (USCLKS = 3), the clock is provided
directly by the signal on the USART CLK pin. No division is active. The value written in BRGR
has no effect. The external clock frequency must be at least 4.5 times lower than the system
clock.
When either the external clock CLK or the internal clock divided (CLK_USART/DIV) is selected,
the value programmed in CD must be even if the user has to ensure a 50:50 mark/space ratio on
the CLK pin. If the internal clock CLK_USART is selected, the Baud Rate Generator ensures a
50:50 duty cycle on the CLK pin, even if the value programmed in CD is odd.
The ISO7816 specification defines the bit rate with the following formula:
where:
Di is a binary value encoded on a 4-bit field, named DI, as represented in
Fi is a binary value encoded on a 4-bit field, named FI, as represented in
Table 25-6
baud rate clock.
If the USART is configured in ISO7816 Mode, the clock selected by the USCLKS field in the
Mode Register (MR) is first divided by the value programmed in the field CD in the Baud Rate
• B is the bit rate
• Di is the bit-rate adjustment factor
• Fi is the clock frequency division factor
• f is the ISO7816 clock frequency (Hz)
0010
0010
558
2
23.25
46.5
37.2
774
744
372
186
93
62
shows the resulting Fi/Di Ratio, which is the ratio between the ISO7816 clock and the
B
0011
=
744
139.5
69.75
34.87
Di
----- -
Fi
1116
1116
55.8
558
279
0011
93
×
4
f
0100
1116
1488
1488
46.5
74.4
744
372
186
124
93
0100
0101
1488
8
232.5
116.2
58.13
1806
1860
930
465
155
93
0110
1860
0101
16
42.66
25.6
512
512
256
128
64
32
16
1001
512
0110
38.4
768
768
384
192
96
48
24
64
32
1010
768
85.33
1024
1024
51.2
512
256
128
64
32
1011
1024
1000
Table
12
Table
AT32UC3C
1536
1536
76.8
25-5.
768
384
192
128
25-4.
1100
1536
96
48
1001
20
170.6
102.4
1101
2048
2048
2048
1024
512
256
128
64
570