AT32UC3C1512C Atmel Corporation, AT32UC3C1512C Datasheet - Page 1122

• Manufacturer Part Number: AT32UC3C1512C
• Manufacturer: Atmel Corporation

Specifications of AT32UC3C1512C

• Flash (kbytes): 512 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 81
• Ext Interrupts: 100
• Usb Transceiver: 1
• Quadrature Decoder Channels: 2
• Usb Speed: Full Speed
• Usb Interface: Device + OTG
• Spi: 7
• Twi (i2c): 3
• Uart: 5
• Can: 2
• Lin: 5
• Ssc: 1
• Ethernet: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 4
• Dac Resolution (bits): 12
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 68
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6 or 4.5 to 5.5
• Operating Voltage (vcc): 3.0 to 3.6 or 4.5 to 5.5
• Fpu: Yes
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 22
• Input Capture Channels: 12
• Pwm Channels: 19
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

36.7.3
Name:
Access Type:
Offset:
Reset Value:
• STATE1: Sequencer 1 State Register
• STATE0: Sequencer 0 State Register
• RUNT: Running Timer Status
• SUTD: Start-up Time Done
• MSOC1: Sequencer 1 Missed Start-Of-Conversion
• MSOC0: Sequencer 0 Missed Start-Of-Conversion
• WM1: Window Monitor 1
32117C–AVR-08/11
LOVR1
RUNT
31
23
15
7
-
-
This field is set to the current conversion identifier.
This field is set to the current conversion identifier.
This bit is set when the internal timer is started.
This bit is cleared when the internal timer is stopped.
This bit is set when a start-up done event occurs.
This bit is cleared when the corresponding bit in SCR is written to one.
This bit is set when a start-of-conversion is missed.
This bit is cleared when the corresponding bit in SCR is written to one.
This bit is set when a start-of-conversion is missed.
This bit is cleared when the corresponding bit in SCR is written to one.
This bit is set when the watched result value goes to the defined window.
This bit is cleared when the corresponding bit in SCR is written to one.
Status Register
SUTD
OVR1
30
22
14
6
-
-
SR
Read-only
0x08
0x00000000
MSOC1
SEOC1
29
21
13
5
-
-
MSOC0
SEOS1
28
20
12
4
-
LOVR0
WM1
27
19
11
3
OVR0
WM0
26
18
10
2
STATE1
STATE0
SEOC0
25
17
9
1
-
AT32UC3C
SEOS0
24
16
8
0
-
1122