AT32UC3C1512C Atmel Corporation, AT32UC3C1512C Datasheet - Page 234

• Manufacturer Part Number: AT32UC3C1512C
• Manufacturer: Atmel Corporation

Specifications of AT32UC3C1512C

• Flash (kbytes): 512 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 81
• Ext Interrupts: 100
• Usb Transceiver: 1
• Quadrature Decoder Channels: 2
• Usb Speed: Full Speed
• Usb Interface: Device + OTG
• Spi: 7
• Twi (i2c): 3
• Uart: 5
• Can: 2
• Lin: 5
• Ssc: 1
• Ethernet: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 4
• Dac Resolution (bits): 12
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 68
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6 or 4.5 to 5.5
• Operating Voltage (vcc): 3.0 to 3.6 or 4.5 to 5.5
• Fpu: Yes
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 22
• Input Capture Channels: 12
• Pwm Channels: 19
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

14.7.4
Name:
Access Type:
Offset:
Reset Value:
• CHS: Channel Status
32117C–AVR-08/11
31
23
15
7
0: The corresponding channel is disabled.
1: The corresponding channel is enabled.
This bit is cleared when the corresponding bit in CHDR is written to one.
This bit is set when the corresponding bit in CHER is written to one.
Note:
Channels 0 to 31 are controlled by CHSR0.
Channels 32 to 63 are controlled by CHSR1.
Please refer to the Module Configuration section at the end of this Chapter for device-specific channel mapping information.
Channel Status Register
30
22
14
6
CHSR0 - CHSR1
Read-only
0x010 - 0x014
0x00000000
29
21
13
5
28
20
12
4
CHS
CHS
CHS
CHS
27
19
11
3
26
18
10
2
25
17
9
1
AT32UC3C
24
16
8
0
234