AT32UC3C1512C Atmel Corporation, AT32UC3C1512C Datasheet - Page 340

• Manufacturer Part Number: AT32UC3C1512C
• Manufacturer: Atmel Corporation

Specifications of AT32UC3C1512C

• Flash (kbytes): 512 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 81
• Ext Interrupts: 100
• Usb Transceiver: 1
• Quadrature Decoder Channels: 2
• Usb Speed: Full Speed
• Usb Interface: Device + OTG
• Spi: 7
• Twi (i2c): 3
• Uart: 5
• Can: 2
• Lin: 5
• Ssc: 1
• Ethernet: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 4
• Dac Resolution (bits): 12
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 68
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6 or 4.5 to 5.5
• Operating Voltage (vcc): 3.0 to 3.6 or 4.5 to 5.5
• Fpu: Yes
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 22
• Input Capture Channels: 12
• Pwm Channels: 19
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

18.7
The SMC is programmed using the registers listed in
is used to program the parameters of the external device connected on it. In
denotes the chip select number. Sixteen bytes (0x10) are required per chip select.
The user must complete writing the configuration by writing anyone of the Mode Registers.
Table 18-8.
32117C–AVR-08/11
0x0C + CS_number*0x10
0x00 + CS_number*0x10
0x04 + CS_number*0x10
0x08 + CS_number*0x10
User Interface
Offset
SMC Register Memory Map
Setup Register
Pulse Register
Cycle Register
Mode Register
Register
Table 18-8 on page
Register Name
SETUP
PULSE
CYCLE
MODE
340. For each chip select, a set of four registers
Table 18-8 on page
Read/Write
Read/Write
Read/Write
Read/Write
Access
AT32UC3C
340, “CS_number”
0x01010101
0x01010101
0x00030003
0x10002103
Reset
340