AT32UC3A464 Atmel Corporation, AT32UC3A464 Datasheet - Page 443

• Manufacturer Part Number: AT32UC3A464
• Manufacturer: Atmel Corporation

Specifications of AT32UC3A464

• Flash (kbytes): 64 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• Hardware Qtouch Acquisition: No
• Usb Transceiver: 1
• Usb Speed: Hi-Speed
• Usb Interface: Device + OTG
• Spi: 6
• Twi (i2c): 2
• Uart: 4
• Ssc: 1
• Sd / Emmc: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 128
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6
• Operating Voltage (vcc): 3.0 to 3.6
• Fpu: No
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

22. Two-wire Slave Interface (TWIS)
22.1
22.2
32072G–11/2011
Features
Overview
Rev.: 1.0.0.1
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The Atmel Two-wire Slave Interface (TWIS) interconnects components on a unique two-wire
bus, made up of one clock line and one data line with speeds of up to 400 kbit/s, based on a
byte-oriented transfer format. It can be used with any Atmel Two-wire Interface bus, I²C, or
SMBus-compatible master. The TWIS is always a bus slave and can transfer sequential or sin-
gle bytes.
Below,
compatible device.
Table 22-1.
Note:
I²C
Standard-mode (100 kbit/s)
Fast-mode (400 kbit/s)
7 or 10 bits Slave Addressing
START BYTE
Repeated Start (Sr) Condition
ACK and NAK Management
Slope control and input filtering (Fast mode)
Clock stretching
Compatible with I
Compatible with SMBus standard
Compatible with PMBus
DMA interface for reducing CPU load
Arbitrary transfer lengths, including 0 data bytes
Optional clock stretching if transmit or receive buffers not ready for data transfer
32-bit Peripheral Bus interface for configuration of the interface
– Transfer speeds of 100 and 400 kbit/s
– 7 and 10-bit and General Call addressing
– Hardware Packet Error Checking (CRC) generation and verification with ACK response
– SMBALERT interface
– 25 ms clock low timeout delay
– 25 ms slave cumulative clock low extend time
Standard
Table 22-1
1. START + b000000001 + Ack + Sr
(1)
Atmel TWIS Compatibility with I²C Standard
lists the compatibility level of the Atmel Two-wire Slave Interface and a full I²C
²
C standard
Atmel TWIS
Supported
Supported
Supported
Not Supported
Supported
Supported
Supported
Supported
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