AT32UC3A364 Atmel Corporation, AT32UC3A364 Datasheet - Page 512
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AT32UC3A364
Manufacturer Part Number
AT32UC3A364
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(33 pages)
3.AT32UC3A0128.pdf
(159 pages)
4.AT32UC3A3128.pdf
(91 pages)
5.AT32UC3A3128.pdf
(1012 pages)
Specifications of AT32UC3A364
Flash (kbytes)
64 Kbytes
Pin Count
144
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
110
Ext Interrupts
110
Usb Transceiver
1
Usb Speed
Hi-Speed
Usb Interface
Device + OTG
Spi
6
Twi (i2c)
2
Uart
4
Lin
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
16
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
128
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
18
Input Capture Channels
12
Pwm Channels
12
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT32UC3A364-ALU
Manufacturer:
ATMEL
Quantity:
230
Company:
Part Number:
AT32UC3A364-ALUR
Manufacturer:
AVAGO
Quantity:
11 439
Part Number:
AT32UC3A364S-ALUT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- AT32UC3A0128 PDF datasheet
- AT32UC3A0128 PDF datasheet #2
- AT32UC3A0128 PDF datasheet #3
- AT32UC3A3128 PDF datasheet #4
- AT32UC3A3128 PDF datasheet #5
- Current page: 512 of 1012
- Download datasheet (16Mb)
24.7.1.3
32072G–11/2011
Receiver clock management
be inverted independently by writing a one to the Transmit Clock Inversion bit in TCMR
(TCMR.CKI).
The transmitter can also drive the TX_CLOCK pin continuously or be limited to the actual data
transfer, depending on the Transmit Clock Output Mode Selection field in the TCMR register
(TCMR.CKO). The TCMR.CKI bit has no effect on the clock outputs.
Writing 0b10 to the TCMR.CKS field to select TX_CLOCK pin and 0b001 to the TCMR.CKO field
to select Continuous Transmit Clock can lead to unpredictable results.
Figure 24-6. Transmitter Clock Management
The receiver clock is generated from the transmitter clock, the divider clock, or an external clock
scanned on the RX_CLOCK pin. The receive clock is selected by writing to the Receive Clock
Selection field in the Receive Clock Mode Register (RCMR.CKS). The receive clock can be
inverted independently by writing a one to the Receive Clock Inversion bit in RCMR
(RCMR.CKI).
The receiver can also drive the RX_CLOCK pin continuously or be limited to the actual data
transfer, depending on the Receive Clock Output Mode Selection field in the RCMR register
(RCMR.CKO). The RCMR.CKI bit has no effect on the clock outputs.
Writing 0b10 to the RCMR.CKS field to select RX_CLOCK pin and 0b001 to the RCMR.CKO
field to select Continuous Receive Clock can lead to unpredictable results.
TX_CLOCK
Receiver
Divider
Clock
Clock
CKS
MUX
CKO
Controller
Tri-state
MUX
CKI
INV
Data Transfer
Controller
Tri-state
CKG
Transmitter
Output
Clock
Clock
512
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