AT32UC3A364 Atmel Corporation, AT32UC3A364 Datasheet - Page 215

• Manufacturer Part Number: AT32UC3A364
• Manufacturer: Atmel Corporation

Specifications of AT32UC3A364

• Flash (kbytes): 64 Kbytes
• Pin Count: 144
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 110
• Ext Interrupts: 110
• Usb Transceiver: 1
• Usb Speed: Hi-Speed
• Usb Interface: Device + OTG
• Spi: 6
• Twi (i2c): 2
• Uart: 4
• Lin: 4
• Ssc: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 16
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 128
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6
• Operating Voltage (vcc): 3.0 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 18
• Input Capture Channels: 12
• Pwm Channels: 12
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

15.7.4
Register Name:
Access Type:
Offset:
Reset Value:
• PS: Page Size
• PMEN: Page Mode Enabled
• TDFMODE: TDF Optimization
• TDFCYCLES: Data Float Time
32072G–11/2011
PS
0
1
2
3
31
23
15
–
–
–
7
–
If page mode is enabled, this field indicates the size of the page in bytes.
1: Asynchronous burst read in page mode is applied on the corresponding chip select.
0: Standard read is applied.
1: TDF optimization is enabled. The number of TDF wait states is optimized using the setup period of the next read/write
access.
0: TDF optimization is disabled.The number of TDF wait states is inserted before the next access begins.
This field gives the integer number of clock cycles required by the external device to release the data after the rising edge of the
read controlling signal. The SMC always provide one full cycle of bus turnaround after the TDFCYCLES period. The external
bus cannot be used by another chip select during TDFCYCLES plus one cycles. From 0 up to 15 TDFCYCLES can be set.
Mode Register
Page Size
4-byte page
8-byte page
16-byte page
32-byte page
30
22
14
–
–
–
6
–
MODE
Read/Write
0x0C + CS_number*0x10
0x10002103
29
21
13
–
5
EXNWMODE
DBW
PS
TDFMODE
28
20
12
4
27
19
11
–
–
3
–
26
18
10
–
–
2
–
TDFCYCLES
WRITEMODE
25
17
–
9
–
1
READMODE
PMEN
BAT
24
16
8
0
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