RS8234EBGC Mindspeed Technologies, RS8234EBGC Datasheet - Page 45

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RS8234EBGC

Manufacturer Part Number
RS8234EBGC
Description
RS8234EBGC ATM XBR SAR
Manufacturer
Mindspeed Technologies
Datasheet

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RS8234
ATM ServiceSAR Plus with xBR Traffic Management
28234-DSH-001-B
cells deep in order to optimize the balance between Cell Delay Variation (CDV)
(which increases with longer transmit FIFO depth) and PCI latency protection
(which decreases with shorter transmit FIFO depth).
(or Virtual FIFO). This is intended for circuit-based CBR traffic such as voice
channel(s).
independent parallel segmentation status queues. The RS8234 writes
segmentation status queue entries on either PDU boundaries or buffer boundaries,
selectable on a per-VCC basis. PDU boundary status reporting is called Message
Mode, while buffer status reporting is called Streaming Mode.
The system designer can set the depth of the transmit FIFO from one to nine
The RS8234 provides a method to segment traffic from a fixed PCI address
The RS8234 reports segmentation status to the host on one of a set of 32
Mindspeed Technologies
2.3 Automated Segmentation Engine
2.0 Architecture Overview
2-13

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