RS8234EBGC Mindspeed Technologies, RS8234EBGC Datasheet - Page 304

• Manufacturer Part Number: RS8234EBGC
• Description: RS8234EBGC ATM XBR SAR
• Manufacturer: Mindspeed Technologies

13.0 RS8234 Registers
13.6 Counters and Status Registers
13.6 Counters and Status Registers
0x160 - ATM Cells Transmitted Counter (CELL_XMIT_CNT)
This register counts the number of user data cells transmitted by the segmentation coprocessor. The counter is
reset to zero by an assertion of either the HRST* system reset pin or the GLOBAL_RESET bit in the CONFIG0
register. Optionally, an interrupt can be programmed when the counter rolls over.
0x164 - ATM Cells Received Counter (CELL_RCVD_CNT)
This register counts the number of assigned cells received by the reassembly coprocessor. The counter is reset to
zero by an assertion of either the HRST* system reset pin or the GLOBAL_RESET bit in the CONFIG0
register. Optionally, an interrupt can be programmed when the counter rolls over.
0x168 - ATM Cells Discarded Counter (CELL_DSC_CNT)
This register counts the number of unassigned cells received by the reassembly coprocessor. The counter is reset
to zero by an assertion of either the HRST* system reset pin or the GLOBAL_RESET bit in the CONFIG0
register. Optionally, an interrupt can be programmed when the counter rolls over.
13-22
31-0
31-0
31-0
Bit
Bit
Bit
Field
Field
Size
Size
Field
Size
32
32
32
CELL_XMIT_CNT
CELL_DSC_CNT
CELL_RCVD_CNT
Name
Name
Name
Mindspeed Technologies
Count of unassigned cells dropped.
Count of user data cells transmitted.
Count of assigned received cells.
ATM ServiceSAR Plus with xBR Traffic Management
™
Description
Description
Description
28234-DSH-001-B
RS8234