AN983B-BG-T-V8 Infineon Technologies, AN983B-BG-T-V8 Datasheet - Page 76

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AN983B-BG-T-V8

Manufacturer Part Number
AN983B-BG-T-V8
Description
IC PCI TO ETHERNET LAN 128-PQFP
Manufacturer
Infineon Technologies
Datasheet

Specifications of AN983B-BG-T-V8

Applications
Ethernet Controller
Interface
USB
Voltage - Supply
3 V ~ 3.6 V
Package / Case
128-BFQFP
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
AN983BBGTV8
SP000074652

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AN983B-BG-T-V8
Manufacturer:
Infineon Technologies
Quantity:
10 000
PCI Bus Performance Counter
PCIC_CSR19
PCI Bus Performance Counter
Field
CLKCNT
Res
DWCNT
Power Management Command and Status
(The same register value mapping to CR49-PMR1)
PMCSR_CSR20
Power Management Command and Status
Field
Res
PMES
Data Sheet
Bits
31:16
15:8
7:0
Bits
31:16
15
Type
ro*
ro
ro*
Type
ro
ro
Description
Clock Count
The number of PCI clock from read request asserted to access
completed. This PCI clock number is accumulated all the read command
cycles from last CSR19 read to current CSR19 read.
Note: ro*: Read only and cleared by reading
Reserved
Double Word Count
The number of double word accessed by the last bus master. This double
word number is accumulated in all the bus master data transactions from
last CSR19 read to current CSR19 read.
Note: ro*: Read only and cleared by reading
Description
Reserved
PME_Status
This bit is set when the AN983B/BX would normally assert the PME#
signal for wake-up event, this bit is independent of the state of the PME-
En bit. Writing a “1” to this bit will clear it and cause the AN983B/BX to
stop asserting a PME# (if enabled). Writing a “0” has no effect. Since the
AN983B/BX doesn’t supports PME# from D3cold, this bit is defaulted to
“0”.
Registers and Descriptors DescriptionPCI Control/Status Registers
Offset
Offset
8C
90
76
H
H
Rev. 1.81, 2005-12-15
AN983B/BX
Reset Value
Reset Value
0000 0000
0000 0000
H
H

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