AN983B-BG-T-V8 Infineon Technologies, AN983B-BG-T-V8 Datasheet - Page 14

• Manufacturer Part Number: AN983B-BG-T-V8
• Description: IC PCI TO ETHERNET LAN 128-PQFP
• Manufacturer: Infineon Technologies

Specifications of AN983B-BG-T-V8

• Applications: Ethernet Controller
• Interface: USB
• Voltage - Supply: 3 V ~ 3.6 V
• Package / Case: 128-BFQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: AN983BBGTV8; SP000074652

Table 3
Pin or Ball
No.
33, 34
35, 36
38, 39
40, 41
46, 47
49, 50
51, 53
54, 56
70, 72
73, 75
76, 78
79, 81
84, 85
86, 88
89, 90
93, 94
43
57
69
83
44
59
60
61
63
64
65
66
68
Data Sheet
Pin Definitions and Functions (cont’d)
Name
AD-31, 30
AD-29, 28
AD-27, 26
AD-25, 24
AD-23, 22
AD-21, 20
AD-19, 18
AD-17, 16
AD-15, 14
AD-13, 12
AD-11, 10
AD-9, 8
AD-7, 6
AD-5, 4
AD-3, 2
AD-1, 0
C-BEB3
C-BEB2
C-BEB1
C-BEB0
IDSEL
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
PERR#
SERR#
PAR
Pin
Type
I/O
I/O
I
I/O
I/O
I/O
I/O
I/O
I/O
O/D
I/O
Buffer
Type
Function
Multiplexed Address Data Pin of PCI Bus
Bus Command and Byte Enable
Initialization Device Select
This signal is asserted when host issues the configuration
cycles to the AN983B/BX.
Begin and Duration of Bus Access
Driven by master device
Master Device is Ready to Data Transaction
Slave Device is Ready to Data Transaction
Device Select
Device select, target is driving to indicate the address is
decoded
Stop the Current Transaction
Target device request the master device to stop the current
transaction
Data Parity Error
Data parity error is detected, driven by the agent receiving
data
Address Parity Error
Parity
Parity, even parity (AD [31:0] + C/BE [3:0]), master drives
par for address and write data phase, target drives par for
read data phase
14
Rev. 1.81, 2005-12-15
Pin Description
AN983B/BX