AN983B-BG-T-V8 Infineon Technologies, AN983B-BG-T-V8 Datasheet - Page 53

• Manufacturer Part Number: AN983B-BG-T-V8
• Description: IC PCI TO ETHERNET LAN 128-PQFP
• Manufacturer: Infineon Technologies

Specifications of AN983B-BG-T-V8

• Applications: Ethernet Controller
• Interface: USB
• Voltage - Supply: 3 V ~ 3.6 V
• Package / Case: 128-BFQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: AN983BBGTV8; SP000074652

PCI Access Register
PAR_CSR0
PCI Access Register
Field
Res
MWIE
MRLE
Res
MRME
Res
TAP
Res
Data Sheet
Bits
31:25
24
23
22
21
20:19
18:17
16
Type
ro
rw*
rw*
ro
rw*
ro
rw*
ro
Description
Reserved
Memory Write and Invalidate Enable
Note: rw*: Before writing the transmitting and receiving operations should
0
1
Memory Read Line Enable
Note: rw*: Before writing the transmitting and receiving operations should
1
Reserved
Memory Read Multiple Enable
Note: rw*: Before writing the transmitting and receiving operations should
1
Reserved
Transmit Auto-polling in Transmit Suspended State
Note: rw*: Before writing the transmitting and receiving operations should
00
01
10
11
Reserved
Registers and Descriptors DescriptionPCI Control/Status Registers
B
B
B
B
B
B
B
B
be stopped.
command and use memory write commands instead
command. AN983B/BX will generate this command while writing
full cache lines
be stopped.
read access instruction reach the cache line boundary. If the read
access instruction doesn’t reach the cache line boundary then
AN983B/BX uses the memory read command instead.
be stopped.
while reading full cache line. If the memory is not cache aligned the
AN983B/BX uses memory read command instead.
be stopped.
, enable AN983B/BX to generate memory read line command while
, enable AN983B/BX to generate memory read multiple commands
, disable AN983B/BX to generate memory write invalidate
, enable AN983B/BX to generate memory write invalidate
, disable auto-polling (default)
, polling own-bit every 200 μ s
, polling own-bit every 800 μ s
, polling own-bit every 1600 μ s
Offset
00
53
H
Rev. 1.81, 2005-12-15
AN983B/BX
Reset Value
0000 1000
H