PI7C9X110BNBE Pericom Semiconductor, PI7C9X110BNBE Datasheet - Page 9

• Manufacturer Part Number: PI7C9X110BNBE
• Description: IC PCIE TO PCI REV BRG 160LFBGA
• Manufacturer: Pericom Semiconductor

Specifications of PI7C9X110BNBE

• Applications: PCI-to-PCI Bridge
• Interface: I²C
• Voltage - Supply: 1.8 V
• Package / Case: 160-LBGA
• Mounting Type: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Operating Temperature (max): 85C
• Rad Hardened: No
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Compliant

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Pericom Semiconductor – Confidential
CONTROL AND STATUS REGISTERS FOR NON-TRANSPARENT BRIDGE MODE
122
UPSTREAM I/O OR MEMORY 1 SETUP REGISTER – OFFSET ECh............................................. 112
MESSAGE SIGNALED INTERRUPTS ID REGISTER – F0h............................................................. 114
NEXT CAPABILITIES POINTER REGISTER – F0h.......................................................................... 114
MESSAGE CONTROL REGISTER – OFFSET F0h ........................................................................... 114
MESSAGE ADDRESS REGISTER – OFFSET F4h ............................................................................ 114
MESSAGE UPPER ADDRESS REGISTER – OFFSET F8h............................................................... 114
MESSAGE DATA REGISTER – OFFSET FCh................................................................................... 114
ADVANCE ERROR REPORTING CAPABILITY ID REGISTER – OFFSET 100h ............................ 115
ADVANCE ERROR REPORTING CAPABILITY VERSION REGISTER – OFFSET 100h ................ 115
NEXT CAPABILITY OFFSET REGISTER – OFFSET 100h .............................................................. 115
UNCORRECTABLE ERROR STATUS REGISTER – OFFSET 104h ................................................. 115
UNCORRECTABLE ERROR MASK REGISTER – OFFSET 108h .................................................... 115
UNCORRECTABLE ERROR SEVERITY REGISTER – OFFSET 10Ch............................................. 116
CORRECTABLE ERROR STATUS REGISTER – OFFSET 110h....................................................... 116
CORRECTABLE ERROR MASK REGISTER – OFFSET 114h .......................................................... 116
ADVANCED ERROR CAPABILITIES AND CONTROL REGISTER – OFFSET 118h...................... 117
HEADER LOG REGISTER 1 – OFFSET 11Ch .................................................................................. 117
HEADER LOG REGISTER 2 – OFFSET 120h................................................................................... 117
HEADER LOG REGISTER 3 – OFFSET 124h................................................................................... 117
HEADER LOG REGISTER 4 – OFFSET 128h................................................................................... 117
SECONDARY UNCORRECTABLE ERROR STATUS REGISTER – OFFSET 12Ch ......................... 117
SECONDARY UNCORRECTABLE ERROR MASK REGISTER – OFFSET 130h ............................. 118
SECONDARY UNCORRECTABLE ERROR SEVERITY REGISTER – OFFSET 134h ...................... 118
SECONDARY ERROR CAPABILITY AND CONTROL REGISTER – OFFSET 138h........................ 119
SECONDARY HEADER LOG REGISTER – OFFSET 13Ch – 148h.................................................. 119
RESERVED REGISTER – OFFSET 14Ch .......................................................................................... 119
VC CAPABILITY ID REGISTER – OFFSET 150h ............................................................................. 119
VC CAPABILITY VERSION REGISTER – OFFSET 150h ................................................................. 119
NEXT CAPABILITY OFFSET REGISTER – OFFSET 150h .............................................................. 120
PORT VC CAPABILITY REGISTER 1 – OFFSET 154h .................................................................... 120
PORT VC CAPABILITY REGISTER 2 – OFFSET 158h .................................................................... 120
PORT VC CONTROL REGISTER – OFFSET 15Ch........................................................................... 120
PORT VC STATUS REGISTER – OFFSET 15Ch............................................................................... 120
VC0 RESOURCE CAPABILITY REGISTER – OFFSET 160h ........................................................... 120
VC0 RESOURCE CONTROL REGISTER – OFFSET 164h ............................................................... 120
VC0 RESOURCE STATUS REGISTER – OFFSET 168h ................................................................... 121
RESERVED REGISTERS – OFFSET 16Ch – 300h ............................................................................ 121
EXTRA GPI/GPO DATA AND CONTROL REGISTER – OFFSET 304h........................................... 121
RESERVED REGISTERS – OFFSET 308h – 30Ch ............................................................................ 121
REPLAY AND ACKNOWLEDGE LATENCY TIMERS – OFFSET 310h ........................................... 121
RESERVED REGISTERS – OFFSET 314h – FFCh ........................................................................... 121
RESERVED REGISTERS – OFFSET 000h TO 004h.......................................................................... 122
DOWNSTREAM MEMORY 2 TRANSLATED BASE REGISTER – OFFSET 008h ............................ 122
DOWNSTREAM MEMORY 2 SETUP REGISTER – OFFSET 00Ch.................................................. 122
DOWNSTREAM MEMORY 3 TRANSLATED BASE REGISTER – OFFSET 010h ............................ 122
DOWNSTREAM MEMORY 3 SETUP REGISTER – OFFSET 014h .................................................. 123
DOWNSTREAM MEMORY 3 UPPER 32-BIT SETUP REGISTER – OFFSET 018h ........................ 123
RESERVED REGISTERS – OFFSET 01Ch TO 030h ......................................................................... 123
UPSTREAM MEMORY 3 SETUP REGISTER – OFFSET 34h........................................................... 123
UPSTREAM MEMORY 3 UPPER 32-BIT SETUP REGISTER – OFFSET 038h............................... 124
Page 9 of 144
April 2010, Revision 3.0
PCIe-to-PCI Reversible Bridge
PI7C9X110